From b90d10da84e3bc58ea12c0298a0dda040a06e9a8 Mon Sep 17 00:00:00 2001 From: Nikita Yushchenko Date: Wed, 16 Feb 2022 21:10:04 +0300 Subject: [PATCH 01/11] arm64: dts: renesas: ulcb-kf: fix wrong comment Fix comment referencing salvator board, likely a copy-paste leftover. ulcb-kf.dtsi has nothing to do with salvator. Signed-off-by: Nikita Yushchenko Fixes: 80c07701d5918928 ("arm64: dts: renesas: ulcb-kf: add pcm3168 sound codec") Link: https://lore.kernel.org/r/20220216181003.114049-1-nikita.yoush@cogentembedded.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi index 889d117dadf5..ae532cd21708 100644 --- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi @@ -414,7 +414,7 @@ &sound_pcm_pins>; ports { - /* rsnd_port0/1 are on salvator-common */ + /* rsnd_port0/1 are defined in ulcb.dtsi */ rsnd_port2: port@2 { reg = <2>; rsnd_for_pcm3168a_play: endpoint { From 14415218a8c01654dcb1b9163890a6407d2709bb Mon Sep 17 00:00:00 2001 From: Sergey Shtylyov Date: Thu, 10 Feb 2022 20:58:12 +0300 Subject: [PATCH 02/11] MAINTAINERS: Specify IRC channel for Renesas ARM32 port The Renesas ARM ports do have their own IRC channel #renesas-soc (initially created on Freenode, then moved to Liberta.Chat). Hopefully, adding it to this file will attract more people... :-) Signed-off-by: Sergey Shtylyov Link: https://lore.kernel.org/r/2f108f63-0cf7-cc4c-462e-ec63736234cf@omp.ru Signed-off-by: Geert Uytterhoeven --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index ea3e6c914384..c3bfd3ae5cfb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2640,6 +2640,7 @@ M: Magnus Damm L: linux-renesas-soc@vger.kernel.org S: Supported Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ +C: irc://irc.libera.chat/renesas-soc T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next F: Documentation/devicetree/bindings/arm/renesas.yaml F: arch/arm/boot/dts/emev2* From 3f67fc2a84e9ca788c94076ee3cb9ed6f4e6a99f Mon Sep 17 00:00:00 2001 From: Sergey Shtylyov Date: Thu, 10 Feb 2022 20:59:57 +0300 Subject: [PATCH 03/11] MAINTAINERS: Specify IRC channel for Renesas ARM64 port The Renesas ARM ports do have their own IRC channel #renesas-soc (initially created on Freenode, then moved to Liberta.Chat). Hopefully, adding it to this file will attract more people... :-) Signed-off-by: Sergey Shtylyov Link: https://lore.kernel.org/r/6c08e98f-c7bb-9d95-5032-69022e43e39b@omp.ru Signed-off-by: Geert Uytterhoeven --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index c3bfd3ae5cfb..695e2bbb85f7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2527,6 +2527,7 @@ M: Magnus Damm L: linux-renesas-soc@vger.kernel.org S: Supported Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ +C: irc://irc.libera.chat/renesas-soc T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next F: Documentation/devicetree/bindings/arm/renesas.yaml F: arch/arm64/boot/dts/renesas/ From 8ca367e26ad9f86f56a08d0988e28375e388bb97 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 18 Jan 2022 18:09:04 +0100 Subject: [PATCH 04/11] arm64: dts: renesas: r8a779f0: Add RWDT node Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas R-Car S4-8 (R8A779F0) SoC. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven Acked-by: Guenter Roeck Reviewed-by: Wolfram Sang Link: https://lore.kernel.org/r/556a7f41bdadceecbe8b59b79ac7e9f592ca17a2.1642525158.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index 5426532d10e2..0ac8c345558e 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -59,6 +59,16 @@ #size-cells = <2>; ranges; + rwdt: watchdog@e6020000 { + compatible = "renesas,r8a779f0-wdt", + "renesas,rcar-gen4-wdt"; + reg = <0 0xe6020000 0 0x0c>; + clocks = <&cpg CPG_MOD 907>; + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; + resets = <&cpg 907>; + status = "disabled"; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a779f0-cpg-mssr"; reg = <0 0xe6150000 0 0x4000>; From 1069050467d8c4e91a49d0e95d776c905afb5b03 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 18 Jan 2022 18:09:05 +0100 Subject: [PATCH 05/11] arm64: dts: renesas: spider-cpu: Enable watchdog timer Enable the watchdog timer on the Spider board. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven Acked-by: Guenter Roeck Reviewed-by: Wolfram Sang Link: https://lore.kernel.org/r/b36b2bb5770e10d906571721a3d73ca205b6f56e.1642525158.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi index 156586532c84..3a90932fe85c 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi @@ -31,6 +31,11 @@ clock-frequency = <32768>; }; +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + &scif3 { status = "okay"; }; From a3a59919ab662682a2cb77b25b0f7b9e6c78737e Mon Sep 17 00:00:00 2001 From: Jean-Jacques Hiblot Date: Mon, 21 Feb 2022 10:50:27 +0100 Subject: [PATCH 06/11] dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock This clock is actually the REF_SYNC_D8 clock. Signed-off-by: Jean-Jacques Hiblot Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220221095032.95054-2-jjhiblot@traphandler.com Signed-off-by: Geert Uytterhoeven --- include/dt-bindings/clock/r9a06g032-sysctrl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/r9a06g032-sysctrl.h b/include/dt-bindings/clock/r9a06g032-sysctrl.h index 90c0f3dc1ba1..d9d7b8b4f426 100644 --- a/include/dt-bindings/clock/r9a06g032-sysctrl.h +++ b/include/dt-bindings/clock/r9a06g032-sysctrl.h @@ -74,6 +74,7 @@ #define R9A06G032_CLK_DDRPHY_PCLK 81 /* AKA CLK_REF_SYNC_D4 */ #define R9A06G032_CLK_FW 81 /* AKA CLK_REF_SYNC_D4 */ #define R9A06G032_CLK_CRYPTO 81 /* AKA CLK_REF_SYNC_D4 */ +#define R9A06G032_CLK_WATCHDOG 82 /* AKA CLK_REF_SYNC_D8 */ #define R9A06G032_CLK_A7MP 84 /* AKA DIV_CA7 */ #define R9A06G032_HCLK_CAN0 85 #define R9A06G032_HCLK_CAN1 86 From 045d0625d305b2c99aba60f787250483af4a23a4 Mon Sep 17 00:00:00 2001 From: Jean-Jacques Hiblot Date: Mon, 21 Feb 2022 10:50:29 +0100 Subject: [PATCH 07/11] ARM: dts: r9a06g032: Add the watchdog nodes This SoC includes 2 watchdog controllers (one per A7 core). Signed-off-by: Jean-Jacques Hiblot Link: https://lore.kernel.org/r/20220221095032.95054-4-jjhiblot@traphandler.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index db657224688a..636a6ab31c58 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -66,6 +66,22 @@ interrupt-parent = <&gic>; ranges; + wdt0: watchdog@40008000 { + compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt"; + reg = <0x40008000 0x1000>; + interrupts = ; + clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; + status = "disabled"; + }; + + wdt1: watchdog@40009000 { + compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt"; + reg = <0x40009000 0x1000>; + interrupts = ; + clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; + status = "disabled"; + }; + sysctrl: system-controller@4000c000 { compatible = "renesas,r9a06g032-sysctrl"; reg = <0x4000c000 0x1000>; From 3ec510bcbdd274d62af96cbc381d2609659b3dc5 Mon Sep 17 00:00:00 2001 From: Jean-Jacques Hiblot Date: Mon, 21 Feb 2022 10:50:30 +0100 Subject: [PATCH 08/11] ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout 60s is a sensible default value. Signed-off-by: Jean-Jacques Hiblot Link: https://lore.kernel.org/r/20220221095032.95054-5-jjhiblot@traphandler.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts index 4e57ae2688fc..3f8f3ce87e12 100644 --- a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts @@ -26,3 +26,8 @@ &uart0 { status = "okay"; }; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; From d05e409e4a66f62e863b140bd1c784f2d93f2562 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 23 Feb 2022 16:58:13 +0000 Subject: [PATCH 09/11] arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog Enable watchdog{0, 1, 2} interfaces on RZ/G2LC SMARC EVK. Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20220223165813.24833-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi index 90cb7ec45751..88a7938017aa 100644 --- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi @@ -206,3 +206,17 @@ }; #endif +&wdt0 { + status = "okay"; + timeout-sec = <60>; +}; + +&wdt1 { + status = "okay"; + timeout-sec = <60>; +}; + +&wdt2 { + status = "okay"; + timeout-sec = <60>; +}; From 48d8ee5b831ec8b6dbe3b4313fed0adcd752e20b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 24 Feb 2022 13:33:40 +0100 Subject: [PATCH 10/11] arm64: dts: renesas: Align GPIO hog names with dtschema Dtschema expects GPIO hogs to end with a "hog" suffix. Also, the convention for node names is to use hyphens, not underscores. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/baee4b9980576ffbab24122fce7147c9cbc2ea59.1645705998.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 2 +- arch/arm64/boot/dts/renesas/hihope-common.dtsi | 2 +- arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi | 2 +- arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts | 2 +- arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts | 4 ++-- arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi | 4 ++-- arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index 17d5c4501bbe..877d076ffcc9 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -77,7 +77,7 @@ }; &gpio6 { - usb_hub_reset { + usb-hub-reset-hog { gpio-hog; gpios = <10 GPIO_ACTIVE_HIGH>; output-high; diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi index 0c7e6f790590..935d06515aa6 100644 --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi @@ -140,7 +140,7 @@ }; &gpio6 { - usb1-reset { + usb1-reset-hog { gpio-hog; gpios = <10 GPIO_ACTIVE_LOW>; output-low; diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi index 40c5e8d6d841..d66d17e34694 100644 --- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi +++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi @@ -20,7 +20,7 @@ * When GP1_20 is LOW LVDS0 is connected to the LVDS connector * When GP1_20 is HIGH LVDS0 is connected to the LT8918L */ - lvds-connector-en-gpio { + lvds-connector-en-hog { gpio-hog; gpios = <20 GPIO_ACTIVE_HIGH>; output-low; diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts b/arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts index a7b27d09f6c2..c1812d1ef06a 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts +++ b/arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts @@ -68,7 +68,7 @@ * When GP0_17 is low LVDS[01] are connected to the LVDS connector * When GP0_17 is high LVDS[01] are connected to the LT8918L */ - lvds-connector-en-gpio{ + lvds-connector-en-hog { gpio-hog; gpios = <17 GPIO_ACTIVE_HIGH>; output-low; diff --git a/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts index 49d141db53f7..fc334b4c2aa4 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts @@ -18,8 +18,8 @@ }; &pinctrl { - /delete-node/ can0-stb; - /delete-node/ can1-stb; + /delete-node/ can0-stb-hog; + /delete-node/ can1-stb-hog; /delete-node/ gpio-sd0-pwr-en-hog; /delete-node/ sd0-dev-sel-hog; /delete-node/ sd1-pwr-en-hog; diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi index 2ef217445f72..9085d8c76ce1 100644 --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi @@ -18,7 +18,7 @@ }; /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */ - can0-stb { + can0-stb-hog { gpio-hog; gpios = ; output-low; @@ -31,7 +31,7 @@ }; /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ - can1-stb { + can1-stb-hog { gpio-hog; gpios = ; output-low; diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi index bff56d696936..37ff2091582e 100644 --- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi @@ -34,7 +34,7 @@ #if SW_RSPI_CAN /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ - can1-stb { + can1-stb-hog { gpio-hog; gpios = ; output-low; From 6a3b10e5c312cae4c1fc7a27bf9a030360999351 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 24 Feb 2022 13:33:09 +0100 Subject: [PATCH 11/11] ARM: dts: renesas: Align GPIO hog names with dtschema Dtschema expects GPIO hogs to end with a "hog" suffix. Also, the convention for node names is to use hyphens, not underscores. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/972d982024cbb04dcf29b2a0ac6beaf41e66c363.1645705927.git.geert+renesas@glider.be --- arch/arm/boot/dts/iwg20d-q7-common.dtsi | 2 +- arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 +- arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts | 4 ++-- arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 4 ++-- arch/arm/boot/dts/r8a7742-iwg21m.dtsi | 2 +- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi index 849034a49a3f..03caea6fc6ff 100644 --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi @@ -181,7 +181,7 @@ }; &gpio2 { - touch-interrupt { + touch-interrupt-hog { gpio-hog; gpios = <12 GPIO_ACTIVE_LOW>; input; diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts index a01f3def1c69..0af63ddc4473 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts @@ -266,7 +266,7 @@ function = "lcd0"; }; - lcd0_mux { + lcd0-mux-hog { /* DBGMD/LCDC0/FSIA MUX */ gpio-hog; gpios = <176 0>; diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts index 3c8a7c8b1fdd..4e58c54cde17 100644 --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts @@ -91,10 +91,10 @@ &gpio0 { /* Disable hogging GP0_18 to output LOW */ - /delete-node/ qspi_en; + /delete-node/ qspi-en-hog; /* Hog GP0_18 to output HIGH to enable VIN2 */ - vin2_en { + vin2-en-hog { gpio-hog; gpios = <18 GPIO_ACTIVE_HIGH>; output-high; diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts index a5a79cdbcd0e..64102b664055 100644 --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts @@ -226,7 +226,7 @@ }; &gpio0 { - touch-interrupt { + touch-interrupt-hog { gpio-hog; gpios = <24 GPIO_ACTIVE_LOW>; input; @@ -234,7 +234,7 @@ }; &gpio1 { - can-trx-en-gpio{ + can-trx-en-hog { gpio-hog; gpios = <28 GPIO_ACTIVE_HIGH>; output-low; diff --git a/arch/arm/boot/dts/r8a7742-iwg21m.dtsi b/arch/arm/boot/dts/r8a7742-iwg21m.dtsi index 5621c9ed698f..b281a4d164b0 100644 --- a/arch/arm/boot/dts/r8a7742-iwg21m.dtsi +++ b/arch/arm/boot/dts/r8a7742-iwg21m.dtsi @@ -37,7 +37,7 @@ &gpio0 { /* GP0_18 set low to select QSPI. Doing so will disable VIN2 */ - qspi_en { + qspi-en-hog { gpio-hog; gpios = <18 GPIO_ACTIVE_HIGH>; output-low; diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index b024621c9981..644802285249 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -116,7 +116,7 @@ }; &gpio2 { - interrupt-fixup { + interrupt-fixup-hog { gpio-hog; gpios = <29 GPIO_ACTIVE_HIGH>; line-name = "hdmi-hpd-int";