ASoC: Updates for v4.14
This is quite a large release by volume of patches and diff, a lot of
that is mechanical cleanup patches but it's great to also see a range of
vendors actively working on adding new features and fixing issues in
their drivers. Intel and Realtek have been especially active here.
- Continued work towards moving everything to the component model from
Morimoto-san.
- Use of devres for jack detection GPIOs, eliminating some potential
resource leaks.
- Jack detection support for Qualcomm MSM8916.
- Support for Allwinner H3, Cirrus Logic CS43130, Intel Kabylake
systems with RT5663, Realtek RT274, TI TLV320AIC32x6 and Wolfson
WM8523.
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Merge tag 'asoc-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v4.14
This is quite a large release by volume of patches and diff, a lot of
that is mechanical cleanup patches but it's great to also see a range of
vendors actively working on adding new features and fixing issues in
their drivers. Intel and Realtek have been especially active here.
- Continued work towards moving everything to the component model from
Morimoto-san.
- Use of devres for jack detection GPIOs, eliminating some potential
resource leaks.
- Jack detection support for Qualcomm MSM8916.
- Support for Allwinner H3, Cirrus Logic CS43130, Intel Kabylake
systems with RT5663, Realtek RT274, TI TLV320AIC32x6 and Wolfson
WM8523.
This commit is contained in:
Takashi Iwai
commit
b06898d119
@ -237,6 +237,14 @@ are the following:
|
||||
This attribute is not present if the scaling driver in use does not
|
||||
support it.
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||||
|
||||
``cpuinfo_cur_freq``
|
||||
Current frequency of the CPUs belonging to this policy as obtained from
|
||||
the hardware (in KHz).
|
||||
|
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This is expected to be the frequency the hardware actually runs at.
|
||||
If that frequency cannot be determined, this attribute should not
|
||||
be present.
|
||||
|
||||
``cpuinfo_max_freq``
|
||||
Maximum possible operating frequency the CPUs belonging to this policy
|
||||
can run at (in kHz).
|
||||
|
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@ -1,14 +1,22 @@
|
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* Renesas R-Car SATA
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||||
|
||||
Required properties:
|
||||
- compatible : should contain one of the following:
|
||||
- compatible : should contain one or more of the following:
|
||||
- "renesas,sata-r8a7779" for R-Car H1
|
||||
("renesas,rcar-sata" is deprecated)
|
||||
- "renesas,sata-r8a7790-es1" for R-Car H2 ES1
|
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- "renesas,sata-r8a7790" for R-Car H2 other than ES1
|
||||
- "renesas,sata-r8a7791" for R-Car M2-W
|
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- "renesas,sata-r8a7793" for R-Car M2-N
|
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- "renesas,sata-r8a7795" for R-Car H3
|
||||
- "renesas,rcar-gen2-sata" for a generic R-Car Gen2 compatible device
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- "renesas,rcar-gen3-sata" for a generic R-Car Gen3 compatible device
|
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- "renesas,rcar-sata" is deprecated
|
||||
|
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When compatible with the generic version nodes
|
||||
must list the SoC-specific version corresponding
|
||||
to the platform first followed by the generic
|
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version.
|
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|
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- reg : address and length of the SATA registers;
|
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- interrupts : must consist of one interrupt specifier.
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- clocks : must contain a reference to the functional clock.
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@ -16,7 +24,7 @@ Required properties:
|
||||
Example:
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||||
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sata0: sata@ee300000 {
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compatible = "renesas,sata-r8a7791";
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compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
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reg = <0 0xee300000 0 0x2000>;
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interrupt-parent = <&gic>;
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interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
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5
Documentation/devicetree/bindings/gpio/gpio-exar.txt
Normal file
5
Documentation/devicetree/bindings/gpio/gpio-exar.txt
Normal file
@ -0,0 +1,5 @@
|
||||
Exportable MPIO interface of Exar UART chips
|
||||
|
||||
Required properties of the device:
|
||||
- exar,first-pin: first exportable pins (0..15)
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- ngpios: number of exportable pins (1..16)
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@ -40,7 +40,7 @@ Optional properties:
|
||||
Example for a Mali-T760:
|
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|
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gpu@ffa30000 {
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compatible = "rockchip,rk3288-mali", "arm,mali-t760", "arm,mali-midgard";
|
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compatible = "rockchip,rk3288-mali", "arm,mali-t760";
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reg = <0xffa30000 0x10000>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
67
Documentation/devicetree/bindings/sound/cs43130.txt
Normal file
67
Documentation/devicetree/bindings/sound/cs43130.txt
Normal file
@ -0,0 +1,67 @@
|
||||
CS43130 DAC
|
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|
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Required properties:
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||||
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- compatible : "cirrus,cs43130", "cirrus,cs4399", "cirrus,cs43131",
|
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"cirrus,cs43198"
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|
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- reg : the I2C address of the device for I2C
|
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|
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- VA-supply, VP-supply, VL-supply, VCP-supply, VD-supply:
|
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power supplies for the device, as covered in
|
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Documentation/devicetree/bindings/regulator/regulator.txt.
|
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|
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|
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Optional properties:
|
||||
|
||||
- reset-gpios : Active low GPIO used to reset the device
|
||||
|
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- cirrus,xtal-ibias:
|
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When external MCLK is generated by external crystal
|
||||
oscillator, CS43130 can be used to provide bias current
|
||||
for external crystal. Amount of bias current sent is
|
||||
set as:
|
||||
1 = 7.5uA
|
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2 = 12.5uA
|
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3 = 15uA
|
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|
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- cirrus,dc-measure:
|
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Boolean, define to enable headphone DC impedance measurement.
|
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|
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- cirrus,ac-measure:
|
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Boolean, define to enable headphone AC impedance measurement.
|
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DC impedance must also be enabled for AC impedance measurement.
|
||||
|
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- cirrus,dc-threshold:
|
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Define 2 DC impedance thresholds in ohms for HP output control.
|
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Default values are 50 and 120 Ohms.
|
||||
|
||||
- cirrus,ac-freq:
|
||||
Define the frequencies at which to measure HP AC impedance.
|
||||
Only used if "cirrus,dc-measure" is defined.
|
||||
Exactly 10 frequencies must be defined.
|
||||
If this properties is undefined, by default,
|
||||
following frequencies are used:
|
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<24 43 93 200 431 928 2000 4309 9283 20000>
|
||||
The above frequencies are logarithmically equally spaced.
|
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Log base is 10.
|
||||
|
||||
Example:
|
||||
|
||||
cs43130: audio-codec@30 {
|
||||
compatible = "cirrus,cs43130";
|
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reg = <0x30>;
|
||||
reset-gpios = <&axi_gpio 54 0>;
|
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VA-supply = <&dummy_vreg>;
|
||||
VP-supply = <&dummy_vreg>;
|
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VL-supply = <&dummy_vreg>;
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||||
VCP-supply = <&dummy_vreg>;
|
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VD-supply = <&dummy_vreg>;
|
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cirrus,xtal-ibias = <2>;
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||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <55 8>;
|
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cirrus,dc-measure;
|
||||
cirrus,ac-measure;
|
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cirrus,dc-threshold = /bits/ 16 <20 100>;
|
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cirrus,ac-freq = /bits/ 16 <24 43 93 200 431 928 2000 4309 9283 20000>;
|
||||
};
|
||||
16
Documentation/devicetree/bindings/sound/dmic.txt
Normal file
16
Documentation/devicetree/bindings/sound/dmic.txt
Normal file
@ -0,0 +1,16 @@
|
||||
Device-Tree bindings for Digital microphone (DMIC) codec
|
||||
|
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This device support generic PDM digital microphone.
|
||||
|
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Required properties:
|
||||
- compatible: should be "dmic-codec".
|
||||
|
||||
Optional properties:
|
||||
- dmicen-gpios: GPIO specifier for dmic to control start and stop
|
||||
|
||||
Example node:
|
||||
|
||||
dmic_codec: dmic@0 {
|
||||
compatible = "dmic-codec";
|
||||
dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
@ -3,7 +3,8 @@ Mediatek AFE PCM controller for mt2701
|
||||
Required properties:
|
||||
- compatible = "mediatek,mt2701-audio";
|
||||
- reg: register location and size
|
||||
- interrupts: Should contain AFE interrupt
|
||||
- interrupts: should contain AFE and ASYS interrupts
|
||||
- interrupt-names: should be "afe" and "asys"
|
||||
- power-domains: should define the power domain
|
||||
- clock-names: should have these clock names:
|
||||
"infra_sys_audio_clk",
|
||||
@ -59,6 +60,7 @@ Example:
|
||||
<0 0x112A0000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
|
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interrupt-names = "afe", "asys";
|
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power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
|
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clocks = <&infracfg CLK_INFRA_AUDIO>,
|
||||
<&topckgen CLK_TOP_AUD_MUX1_SEL>,
|
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|
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@ -31,8 +31,22 @@ Required properties
|
||||
- vdd-cdc-io-supply: phandle to VDD_CDC_IO regulator DT node.
|
||||
- vdd-cdc-tx-rx-cx-supply: phandle to VDD_CDC_TX/RX/CX regulator DT node.
|
||||
- vdd-micbias-supply: phandle of VDD_MICBIAS supply's regulator DT node.
|
||||
|
||||
Optional Properties:
|
||||
- qcom,mbhc-vthreshold-low: Array of 5 threshold voltages in mV for 5 buttons
|
||||
detection on headset when the mbhc is powered up
|
||||
by internal current source, this is a low power.
|
||||
- qcom,mbhc-vthreshold-high: Array of 5 thresold voltages in mV for 5 buttons
|
||||
detection on headset when mbhc is powered up
|
||||
from micbias.
|
||||
- qcom,micbias-lvl: Voltage (mV) for Mic Bias
|
||||
- qcom,hphl-jack-type-normally-open: boolean, present if hphl pin on jack is a
|
||||
NO (Normally Open). If not specified, then
|
||||
its assumed that hphl pin on jack is NC
|
||||
(Normally Closed).
|
||||
- qcom,gnd-jack-type-normally-open: boolean, present if gnd pin on jack is
|
||||
NO (Normally Open). If not specified, then
|
||||
its assumed that gnd pin on jack is NC
|
||||
(Normally Closed).
|
||||
- qcom,micbias1-ext-cap: boolean, present if micbias1 has external capacitor
|
||||
connected.
|
||||
- qcom,micbias2-ext-cap: boolean, present if micbias2 has external capacitor
|
||||
@ -48,6 +62,8 @@ spmi_bus {
|
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reg-names = "pmic-codec-core";
|
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clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
|
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clock-names = "mclk";
|
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qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
|
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qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
|
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interrupt-parent = <&spmi_bus>;
|
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interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
|
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<0x1 0xf0 0x1 IRQ_TYPE_NONE>,
|
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|
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@ -199,10 +199,10 @@ Ex)
|
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sound {
|
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compatible = "simple-scu-audio-card";
|
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...
|
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simple-audio-card,cpu@0 {
|
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simple-audio-card,cpu-0 {
|
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sound-dai = <&rcar_sound 0>;
|
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};
|
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simple-audio-card,cpu@1 {
|
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simple-audio-card,cpu-1 {
|
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sound-dai = <&rcar_sound 1>;
|
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};
|
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simple-audio-card,codec {
|
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@ -441,79 +441,79 @@ rcar_sound: sound@ec500000 {
|
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"clk_a", "clk_b", "clk_c", "clk_i";
|
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|
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rcar_sound,dvc {
|
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dvc0: dvc@0 {
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dvc0: dvc-0 {
|
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dmas = <&audma0 0xbc>;
|
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dma-names = "tx";
|
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};
|
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dvc1: dvc@1 {
|
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dvc1: dvc-1 {
|
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dmas = <&audma0 0xbe>;
|
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dma-names = "tx";
|
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};
|
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};
|
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|
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rcar_sound,mix {
|
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mix0: mix@0 { };
|
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mix1: mix@1 { };
|
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mix0: mix-0 { };
|
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mix1: mix-1 { };
|
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};
|
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|
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rcar_sound,ctu {
|
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ctu00: ctu@0 { };
|
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ctu01: ctu@1 { };
|
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ctu02: ctu@2 { };
|
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ctu03: ctu@3 { };
|
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ctu10: ctu@4 { };
|
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ctu11: ctu@5 { };
|
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ctu12: ctu@6 { };
|
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ctu13: ctu@7 { };
|
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ctu00: ctu-0 { };
|
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ctu01: ctu-1 { };
|
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ctu02: ctu-2 { };
|
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ctu03: ctu-3 { };
|
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ctu10: ctu-4 { };
|
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ctu11: ctu-5 { };
|
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ctu12: ctu-6 { };
|
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ctu13: ctu-7 { };
|
||||
};
|
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|
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rcar_sound,src {
|
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src0: src@0 {
|
||||
src0: src-0 {
|
||||
interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x85>, <&audma1 0x9a>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src1: src@1 {
|
||||
src1: src-1 {
|
||||
interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x87>, <&audma1 0x9c>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src2: src@2 {
|
||||
src2: src-2 {
|
||||
interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x89>, <&audma1 0x9e>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src3: src@3 {
|
||||
src3: src-3 {
|
||||
interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src4: src@4 {
|
||||
src4: src-4 {
|
||||
interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src5: src@5 {
|
||||
src5: src-5 {
|
||||
interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src6: src@6 {
|
||||
src6: src-6 {
|
||||
interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x91>, <&audma1 0xb4>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src7: src@7 {
|
||||
src7: src-7 {
|
||||
interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x93>, <&audma1 0xb6>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src8: src@8 {
|
||||
src8: src-8 {
|
||||
interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x95>, <&audma1 0xb8>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
src9: src@9 {
|
||||
src9: src-9 {
|
||||
interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x97>, <&audma1 0xba>;
|
||||
dma-names = "rx", "tx";
|
||||
@ -521,52 +521,52 @@ rcar_sound: sound@ec500000 {
|
||||
};
|
||||
|
||||
rcar_sound,ssi {
|
||||
ssi0: ssi@0 {
|
||||
ssi0: ssi-0 {
|
||||
interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi1: ssi@1 {
|
||||
ssi1: ssi-1 {
|
||||
interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi2: ssi@2 {
|
||||
ssi2: ssi-2 {
|
||||
interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi3: ssi@3 {
|
||||
ssi3: ssi-3 {
|
||||
interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi4: ssi@4 {
|
||||
ssi4: ssi-4 {
|
||||
interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi5: ssi@5 {
|
||||
ssi5: ssi-5 {
|
||||
interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi6: ssi@6 {
|
||||
ssi6: ssi-6 {
|
||||
interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi7: ssi@7 {
|
||||
ssi7: ssi-7 {
|
||||
interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi8: ssi@8 {
|
||||
ssi8: ssi-8 {
|
||||
interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi9: ssi@9 {
|
||||
ssi9: ssi-9 {
|
||||
interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
|
||||
@ -29,11 +29,14 @@ pdm: pdm@ff040000 {
|
||||
dma-names = "rx";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&pdmm0_clk
|
||||
&pdmm0_fsync
|
||||
&pdmm0_sdi0
|
||||
&pdmm0_sdi1
|
||||
&pdmm0_sdi2
|
||||
&pdmm0_sdi3>;
|
||||
pinctrl-1 = <&pdmm0_sleep>;
|
||||
pinctrl-1 = <&pdmm0_clk_sleep
|
||||
&pdmm0_sdi0_sleep
|
||||
&pdmm0_sdi1_sleep
|
||||
&pdmm0_sdi2_sleep
|
||||
&pdmm0_sdi3_sleep>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -4,7 +4,7 @@ Required properties:
|
||||
- compatible: "rockchip,rk3399-gru-sound"
|
||||
- rockchip,cpu: The phandle of the Rockchip I2S controller that's
|
||||
connected to the codecs
|
||||
- rockchip,codec: The phandle of the MAX98357A/RT5514/DA7219 codecs
|
||||
- rockchip,codec: The phandle of the audio codecs
|
||||
|
||||
Optional properties:
|
||||
- dmic-wakeup-delay-ms : specify delay time (ms) for DMIC ready.
|
||||
|
||||
@ -7,8 +7,12 @@ Required properties:
|
||||
|
||||
- compatible: should be one of the following:
|
||||
- "rockchip,rk3066-i2s": for rk3066
|
||||
- "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036
|
||||
- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
|
||||
- "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228
|
||||
- "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
|
||||
- "rockchip,rk3328-i2s", "rockchip,rk3066-i2s": for rk3328
|
||||
- "rockchip,rk3366-i2s", "rockchip,rk3066-i2s": for rk3366
|
||||
- "rockchip,rk3368-i2s", "rockchip,rk3066-i2s": for rk3368
|
||||
- "rockchip,rk3399-i2s", "rockchip,rk3066-i2s": for rk3399
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
|
||||
33
Documentation/devicetree/bindings/sound/rt274.txt
Normal file
33
Documentation/devicetree/bindings/sound/rt274.txt
Normal file
@ -0,0 +1,33 @@
|
||||
RT274 audio CODEC
|
||||
|
||||
This device supports I2C only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "realtek,rt274".
|
||||
|
||||
- reg : The I2C address of the device.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupts : The CODEC's interrupt output.
|
||||
|
||||
|
||||
Pins on the device (for linking into audio routes) for RT274:
|
||||
|
||||
* DMIC1 Pin
|
||||
* DMIC2 Pin
|
||||
* MIC
|
||||
* LINE1
|
||||
* LINE2
|
||||
* HPO Pin
|
||||
* SPDIF
|
||||
* LINE3
|
||||
|
||||
Example:
|
||||
|
||||
codec: rt274@1c {
|
||||
compatible = "realtek,rt274";
|
||||
reg = <0x1c>;
|
||||
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
@ -12,6 +12,14 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- "realtek,dc_offset_l_manual"
|
||||
- "realtek,dc_offset_r_manual"
|
||||
- "realtek,dc_offset_l_manual_mic"
|
||||
- "realtek,dc_offset_r_manual_mic"
|
||||
Based on the different PCB layout, add the manual offset value to
|
||||
compensate the DC offset for each L and R channel, and they are different
|
||||
between headphone and headset.
|
||||
|
||||
Pins on the device (for linking into audio routes) for RT5663:
|
||||
|
||||
* IN1P
|
||||
|
||||
@ -7,9 +7,6 @@ Required properties:
|
||||
- model - the user-visible name of this sound complex
|
||||
- clocks - should contain entries matching clock names in the clock-names
|
||||
property
|
||||
- clock-names - should contain following entries:
|
||||
- "epll" - indicating the EPLL output clock
|
||||
- "i2s_rclk" - indicating the RCLK (root) clock of the I2S0 controller
|
||||
- samsung,audio-widgets - this property specifies off-codec audio elements
|
||||
like headphones or speakers, for details see widgets.txt
|
||||
- samsung,audio-routing - a list of the connections between audio
|
||||
@ -46,9 +43,6 @@ sound {
|
||||
"IN1", "Mic Jack",
|
||||
"Mic Jack", "MICBIAS";
|
||||
|
||||
clocks = <&clock CLK_FOUT_EPLL>, <&i2s0 CLK_I2S_RCLK_SRC>;
|
||||
clock-names = "epll", "sclk_i2s";
|
||||
|
||||
cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
};
|
||||
|
||||
@ -86,6 +86,9 @@ Optional CPU/CODEC subnodes properties:
|
||||
in dai startup() and disabled with
|
||||
clk_disable_unprepare() in dai
|
||||
shutdown().
|
||||
- system-clock-direction-out : specifies clock direction as 'out' on
|
||||
initialization. It is useful for some aCPUs with
|
||||
fixed clocks.
|
||||
|
||||
Example 1 - single DAI link:
|
||||
|
||||
|
||||
@ -24,6 +24,7 @@ Optional subnode properties:
|
||||
- simple-audio-card,convert-rate : platform specified sampling rate convert
|
||||
- simple-audio-card,convert-channels : platform specified converted channel size (2 - 8 ch)
|
||||
- simple-audio-card,prefix : see routing
|
||||
- simple-audio-card,widgets : Please refer to widgets.txt.
|
||||
- simple-audio-card,routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources.
|
||||
|
||||
@ -8,6 +8,7 @@ Required properties:
|
||||
- compatible: should be one of the following:
|
||||
- "allwinner,sun4i-a10-i2s"
|
||||
- "allwinner,sun6i-a31-i2s"
|
||||
- "allwinner,sun8i-h3-i2s"
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: should contain the I2S interrupt.
|
||||
@ -22,6 +23,7 @@ Required properties:
|
||||
|
||||
Required properties for the following compatibles:
|
||||
- "allwinner,sun6i-a31-i2s"
|
||||
- "allwinner,sun8i-h3-i2s"
|
||||
- resets: phandle to the reset line for this codec
|
||||
|
||||
Example:
|
||||
|
||||
@ -3,7 +3,9 @@ Texas Instruments - tlv320aic32x4 Codec module
|
||||
The tlv320aic32x4 serial control bus communicates through I2C protocols
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "ti,tlv320aic32x4"
|
||||
- compatible - "string" - One of:
|
||||
"ti,tlv320aic32x4" TLV320AIC3204
|
||||
"ti,tlv320aic32x6" TLV320AIC3206, TLV320AIC3256
|
||||
- reg: I2C slave address
|
||||
- supply-*: Required supply regulators are:
|
||||
"iov" - digital IO power supply
|
||||
@ -18,6 +20,8 @@ Optional properties:
|
||||
- reset-gpios: Reset-GPIO phandle with args as described in gpio/gpio.txt
|
||||
- clocks/clock-names: Clock named 'mclk' for the master clock of the codec.
|
||||
See clock/clock-bindings.txt for information about the detailed format.
|
||||
- aic32x4-gpio-func - <array of 5 int>
|
||||
- Types are defined in include/sound/tlv320aic32x4.h
|
||||
|
||||
|
||||
Example:
|
||||
@ -27,4 +31,11 @@ codec: tlv320aic32x4@18 {
|
||||
reg = <0x18>;
|
||||
clocks = <&clks 201>;
|
||||
clock-names = "mclk";
|
||||
aic32x4-gpio-func= <
|
||||
0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
|
||||
0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
|
||||
0x04 /* MFP3 AIC32X4_MFP3_GPIO_ENABLED */
|
||||
0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
|
||||
0x08 /* MFP5 AIC32X4_MFP5_GPIO_INPUT */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -26,6 +26,11 @@ Optional properties:
|
||||
3 - MICBIAS output is connected to AVDD,
|
||||
If this node is not mentioned or if the value is incorrect, then MicBias
|
||||
is powered down.
|
||||
- ai3x-ocmv - Output Common-Mode Voltage selection:
|
||||
0 - 1.35V,
|
||||
1 - 1.5V,
|
||||
2 - 1.65V,
|
||||
3 - 1.8V
|
||||
- AVDD-supply, IOVDD-supply, DRVDD-supply, DVDD-supply : power supplies for the
|
||||
device as covered in Documentation/devicetree/bindings/regulator/regulator.txt
|
||||
|
||||
|
||||
16
Documentation/devicetree/bindings/sound/wm8524.txt
Normal file
16
Documentation/devicetree/bindings/sound/wm8524.txt
Normal file
@ -0,0 +1,16 @@
|
||||
WM8524 audio CODEC
|
||||
|
||||
This device does not use I2C or SPI but a simple Hardware Control Interface.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8524"
|
||||
|
||||
- wlf,mute-gpios: a GPIO spec for the MUTE pin.
|
||||
|
||||
Example:
|
||||
|
||||
codec: wm8524@0 {
|
||||
compatible = "wlf,wm8524";
|
||||
wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
@ -27,5 +27,11 @@ You have to add the following kernel parameters in your elilo.conf:
|
||||
Macbook Pro 17", iMac 20" :
|
||||
video=efifb:i20
|
||||
|
||||
Accepted options:
|
||||
|
||||
nowc Don't map the framebuffer write combined. This can be used
|
||||
to workaround side-effects and slowdowns on other CPU cores
|
||||
when large amounts of console data are written.
|
||||
|
||||
--
|
||||
Edgar Hucek <gimli@dark-green.com>
|
||||
|
||||
@ -459,7 +459,7 @@ pin controller?
|
||||
|
||||
This is done by registering "ranges" of pins, which are essentially
|
||||
cross-reference tables. These are described in
|
||||
Documentation/pinctrl.txt
|
||||
Documentation/driver-api/pinctl.rst
|
||||
|
||||
While the pin allocation is totally managed by the pinctrl subsystem,
|
||||
gpio (under gpiolib) is still maintained by gpio drivers. It may happen
|
||||
|
||||
@ -1,6 +1,31 @@
|
||||
Digital TV (DVB) devices
|
||||
------------------------
|
||||
|
||||
Digital TV devices are implemented by several different drivers:
|
||||
|
||||
- A bridge driver that is responsible to talk with the bus where the other
|
||||
devices are connected (PCI, USB, SPI), bind to the other drivers and
|
||||
implement the digital demux logic (either in software or in hardware);
|
||||
|
||||
- Frontend drivers that are usually implemented as two separate drivers:
|
||||
|
||||
- A tuner driver that implements the logic with commands the part of the
|
||||
hardware with is reponsible to tune into a digital TV transponder or
|
||||
physical channel. The output of a tuner is usually a baseband or
|
||||
Intermediate Frequency (IF) signal;
|
||||
|
||||
- A demodulator driver (a.k.a "demod") that implements the logic with
|
||||
commands the digital TV decoding hardware. The output of a demod is
|
||||
a digital stream, with multiple audio, video and data channels typically
|
||||
multiplexed using MPEG Transport Stream [#f1]_.
|
||||
|
||||
On most hardware, the frontend drivers talk with the bridge driver using an
|
||||
I2C bus.
|
||||
|
||||
.. [#f1] Some standards use TCP/IP for multiplexing data, like DVB-H (an
|
||||
abandoned standard, not used anymore) and ATSC version 3.0 current
|
||||
proposals. Currently, the DVB subsystem doesn't implement those standards.
|
||||
|
||||
Digital TV Common functions
|
||||
---------------------------
|
||||
|
||||
@ -55,8 +80,141 @@ Digital TV Frontend
|
||||
The Digital TV Frontend kABI defines a driver-internal interface for
|
||||
registering low-level, hardware specific driver to a hardware independent
|
||||
frontend layer. It is only of interest for Digital TV device driver writers.
|
||||
The header file for this API is named dvb_frontend.h and located in
|
||||
drivers/media/dvb-core.
|
||||
The header file for this API is named ``dvb_frontend.h`` and located in
|
||||
``drivers/media/dvb-core``.
|
||||
|
||||
Demodulator driver
|
||||
^^^^^^^^^^^^^^^^^^
|
||||
|
||||
The demodulator driver is responsible to talk with the decoding part of the
|
||||
hardware. Such driver should implement :c:type:`dvb_frontend_ops`, with
|
||||
tells what type of digital TV standards are supported, and points to a
|
||||
series of functions that allow the DVB core to command the hardware via
|
||||
the code under ``drivers/media/dvb-core/dvb_frontend.c``.
|
||||
|
||||
A typical example of such struct in a driver ``foo`` is::
|
||||
|
||||
static struct dvb_frontend_ops foo_ops = {
|
||||
.delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
|
||||
.info = {
|
||||
.name = "foo DVB-T/T2/C driver",
|
||||
.caps = FE_CAN_FEC_1_2 |
|
||||
FE_CAN_FEC_2_3 |
|
||||
FE_CAN_FEC_3_4 |
|
||||
FE_CAN_FEC_5_6 |
|
||||
FE_CAN_FEC_7_8 |
|
||||
FE_CAN_FEC_AUTO |
|
||||
FE_CAN_QPSK |
|
||||
FE_CAN_QAM_16 |
|
||||
FE_CAN_QAM_32 |
|
||||
FE_CAN_QAM_64 |
|
||||
FE_CAN_QAM_128 |
|
||||
FE_CAN_QAM_256 |
|
||||
FE_CAN_QAM_AUTO |
|
||||
FE_CAN_TRANSMISSION_MODE_AUTO |
|
||||
FE_CAN_GUARD_INTERVAL_AUTO |
|
||||
FE_CAN_HIERARCHY_AUTO |
|
||||
FE_CAN_MUTE_TS |
|
||||
FE_CAN_2G_MODULATION,
|
||||
.frequency_min = 42000000, /* Hz */
|
||||
.frequency_max = 1002000000, /* Hz */
|
||||
.symbol_rate_min = 870000,
|
||||
.symbol_rate_max = 11700000
|
||||
},
|
||||
.init = foo_init,
|
||||
.sleep = foo_sleep,
|
||||
.release = foo_release,
|
||||
.set_frontend = foo_set_frontend,
|
||||
.get_frontend = foo_get_frontend,
|
||||
.read_status = foo_get_status_and_stats,
|
||||
.tune = foo_tune,
|
||||
.i2c_gate_ctrl = foo_i2c_gate_ctrl,
|
||||
.get_frontend_algo = foo_get_algo,
|
||||
};
|
||||
|
||||
A typical example of such struct in a driver ``bar`` meant to be used on
|
||||
Satellite TV reception is::
|
||||
|
||||
static const struct dvb_frontend_ops bar_ops = {
|
||||
.delsys = { SYS_DVBS, SYS_DVBS2 },
|
||||
.info = {
|
||||
.name = "Bar DVB-S/S2 demodulator",
|
||||
.frequency_min = 500000, /* KHz */
|
||||
.frequency_max = 2500000, /* KHz */
|
||||
.frequency_stepsize = 0,
|
||||
.symbol_rate_min = 1000000,
|
||||
.symbol_rate_max = 45000000,
|
||||
.symbol_rate_tolerance = 500,
|
||||
.caps = FE_CAN_INVERSION_AUTO |
|
||||
FE_CAN_FEC_AUTO |
|
||||
FE_CAN_QPSK,
|
||||
},
|
||||
.init = bar_init,
|
||||
.sleep = bar_sleep,
|
||||
.release = bar_release,
|
||||
.set_frontend = bar_set_frontend,
|
||||
.get_frontend = bar_get_frontend,
|
||||
.read_status = bar_get_status_and_stats,
|
||||
.i2c_gate_ctrl = bar_i2c_gate_ctrl,
|
||||
.get_frontend_algo = bar_get_algo,
|
||||
.tune = bar_tune,
|
||||
|
||||
/* Satellite-specific */
|
||||
.diseqc_send_master_cmd = bar_send_diseqc_msg,
|
||||
.diseqc_send_burst = bar_send_burst,
|
||||
.set_tone = bar_set_tone,
|
||||
.set_voltage = bar_set_voltage,
|
||||
};
|
||||
|
||||
.. note::
|
||||
|
||||
#) For satellite digital TV standards (DVB-S, DVB-S2, ISDB-S), the
|
||||
frequencies are specified in kHz, while, for terrestrial and cable
|
||||
standards, they're specified in Hz. Due to that, if the same frontend
|
||||
supports both types, you'll need to have two separate
|
||||
:c:type:`dvb_frontend_ops` structures, one for each standard.
|
||||
#) The ``.i2c_gate_ctrl`` field is present only when the hardware has
|
||||
allows controlling an I2C gate (either directly of via some GPIO pin),
|
||||
in order to remove the tuner from the I2C bus after a channel is
|
||||
tuned.
|
||||
#) All new drivers should implement the
|
||||
:ref:`DVBv5 statistics <dvbv5_stats>` via ``.read_status``.
|
||||
Yet, there are a number of callbacks meant to get statistics for
|
||||
signal strength, S/N and UCB. Those are there to provide backward
|
||||
compatibility with legacy applications that don't support the DVBv5
|
||||
API. Implementing those callbacks are optional. Those callbacks may be
|
||||
removed in the future, after we have all existing drivers supporting
|
||||
DVBv5 stats.
|
||||
#) Other callbacks are required for satellite TV standards, in order to
|
||||
control LNBf and DiSEqC: ``.diseqc_send_master_cmd``,
|
||||
``.diseqc_send_burst``, ``.set_tone``, ``.set_voltage``.
|
||||
|
||||
.. |delta| unicode:: U+00394
|
||||
|
||||
The ``drivers/media/dvb-core/dvb_frontend.c`` has a kernel thread with is
|
||||
responsible for tuning the device. It supports multiple algoritms to
|
||||
detect a channel, as defined at enum :c:func:`dvbfe_algo`.
|
||||
|
||||
The algorithm to be used is obtained via ``.get_frontend_algo``. If the driver
|
||||
doesn't fill its field at struct :c:type:`dvb_frontend_ops`, it will default to
|
||||
``DVBFE_ALGO_SW``, meaning that the dvb-core will do a zigzag when tuning,
|
||||
e. g. it will try first to use the specified center frequency ``f``,
|
||||
then, it will do ``f`` + |delta|, ``f`` - |delta|, ``f`` + 2 x |delta|,
|
||||
``f`` - 2 x |delta| and so on.
|
||||
|
||||
If the hardware has internally a some sort of zigzag algorithm, you should
|
||||
define a ``.get_frontend_algo`` function that would return ``DVBFE_ALGO_HW``.
|
||||
|
||||
.. note::
|
||||
|
||||
The core frontend support also supports
|
||||
a third type (``DVBFE_ALGO_CUSTOM``), in order to allow the driver to
|
||||
define its own hardware-assisted algorithm. Very few hardware need to
|
||||
use it nowadays. Using ``DVBFE_ALGO_CUSTOM`` require to provide other
|
||||
function callbacks at struct :c:type:`dvb_frontend_ops`.
|
||||
|
||||
Attaching frontend driver to the bridge driver
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
Before using the Digital TV frontend core, the bridge driver should attach
|
||||
the frontend demod, tuner and SEC devices and call
|
||||
@ -74,6 +232,287 @@ part of their handler for :c:type:`device_driver`.\ ``resume()``.
|
||||
|
||||
A few other optional functions are provided to handle some special cases.
|
||||
|
||||
.. _dvbv5_stats:
|
||||
|
||||
Digital TV Frontend statistics
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Introduction
|
||||
^^^^^^^^^^^^
|
||||
|
||||
Digital TV frontends provide a range of
|
||||
:ref:`statistics <frontend-stat-properties>` meant to help tuning the device
|
||||
and measuring the quality of service.
|
||||
|
||||
For each statistics measurement, the driver should set the type of scale used,
|
||||
or ``FE_SCALE_NOT_AVAILABLE`` if the statistics is not available on a given
|
||||
time. Drivers should also provide the number of statistics for each type.
|
||||
that's usually 1 for most video standards [#f2]_.
|
||||
|
||||
Drivers should initialize each statistic counters with length and
|
||||
scale at its init code. For example, if the frontend provides signal
|
||||
strength, it should have, on its init code::
|
||||
|
||||
struct dtv_frontend_properties *c = &state->fe.dtv_property_cache;
|
||||
|
||||
c->strength.len = 1;
|
||||
c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
|
||||
|
||||
And, when the statistics got updated, set the scale::
|
||||
|
||||
c->strength.stat[0].scale = FE_SCALE_DECIBEL;
|
||||
c->strength.stat[0].uvalue = strength;
|
||||
|
||||
.. [#f2] For ISDB-T, it may provide both a global statistics and a per-layer
|
||||
set of statistics. On such cases, len should be equal to 4. The first
|
||||
value corresponds to the global stat; the other ones to each layer, e. g.:
|
||||
|
||||
- c->cnr.stat[0] for global S/N carrier ratio,
|
||||
- c->cnr.stat[1] for Layer A S/N carrier ratio,
|
||||
- c->cnr.stat[2] for layer B S/N carrier ratio,
|
||||
- c->cnr.stat[3] for layer C S/N carrier ratio.
|
||||
|
||||
.. note:: Please prefer to use ``FE_SCALE_DECIBEL`` instead of
|
||||
``FE_SCALE_RELATIVE`` for signal strength and CNR measurements.
|
||||
|
||||
Groups of statistics
|
||||
^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
There are several groups of statistics currently supported:
|
||||
|
||||
Signal strength (:ref:`DTV-STAT-SIGNAL-STRENGTH`)
|
||||
- Measures the signal strength level at the analog part of the tuner or
|
||||
demod.
|
||||
|
||||
- Typically obtained from the gain applied to the tuner and/or frontend
|
||||
in order to detect the carrier. When no carrier is detected, the gain is
|
||||
at the maximum value (so, strength is on its minimal).
|
||||
|
||||
- As the gain is visible through the set of registers that adjust the gain,
|
||||
typically, this statistics is always available [#f3]_.
|
||||
|
||||
- Drivers should try to make it available all the times, as this statistics
|
||||
can be used when adjusting an antenna position and to check for troubles
|
||||
at the cabling.
|
||||
|
||||
.. [#f3] On a few devices, the gain keeps floating if no carrier.
|
||||
On such devices, strength report should check first if carrier is
|
||||
detected at the tuner (``FE_HAS_CARRIER``, see :c:type:`fe_status`),
|
||||
and otherwise return the lowest possible value.
|
||||
|
||||
Carrier Signal to Noise ratio (:ref:`DTV-STAT-CNR`)
|
||||
- Signal to Noise ratio for the main carrier.
|
||||
|
||||
- Signal to Noise measurement depends on the device. On some hardware, is
|
||||
available when the main carrier is detected. On those hardware, CNR
|
||||
measurement usually comes from the tuner (e. g. after ``FE_HAS_CARRIER``,
|
||||
see :c:type:`fe_status`).
|
||||
|
||||
On other devices, it requires inner FEC decoding,
|
||||
as the frontend measures it indirectly from other parameters (e. g. after
|
||||
``FE_HAS_VITERBI``, see :c:type:`fe_status`).
|
||||
|
||||
Having it available after inner FEC is more common.
|
||||
|
||||
Bit counts post-FEC (:ref:`DTV-STAT-POST-ERROR-BIT-COUNT` and :ref:`DTV-STAT-POST-TOTAL-BIT-COUNT`)
|
||||
- Those counters measure the number of bits and bit errors errors after
|
||||
the forward error correction (FEC) on the inner coding block
|
||||
(after Viterbi, LDPC or other inner code).
|
||||
|
||||
- Due to its nature, those statistics depend on full coding lock
|
||||
(e. g. after ``FE_HAS_SYNC`` or after ``FE_HAS_LOCK``,
|
||||
see :c:type:`fe_status`).
|
||||
|
||||
Bit counts pre-FEC (:ref:`DTV-STAT-PRE-ERROR-BIT-COUNT` and :ref:`DTV-STAT-PRE-TOTAL-BIT-COUNT`)
|
||||
- Those counters measure the number of bits and bit errors errors before
|
||||
the forward error correction (FEC) on the inner coding block
|
||||
(before Viterbi, LDPC or other inner code).
|
||||
|
||||
- Not all frontends provide this kind of statistics.
|
||||
|
||||
- Due to its nature, those statistics depend on inner coding lock (e. g.
|
||||
after ``FE_HAS_VITERBI``, see :c:type:`fe_status`).
|
||||
|
||||
Block counts (:ref:`DTV-STAT-ERROR-BLOCK-COUNT` and :ref:`DTV-STAT-TOTAL-BLOCK-COUNT`)
|
||||
- Those counters measure the number of blocks and block errors errors after
|
||||
the forward error correction (FEC) on the inner coding block
|
||||
(before Viterbi, LDPC or other inner code).
|
||||
|
||||
- Due to its nature, those statistics depend on full coding lock
|
||||
(e. g. after ``FE_HAS_SYNC`` or after
|
||||
``FE_HAS_LOCK``, see :c:type:`fe_status`).
|
||||
|
||||
.. note:: All counters should be monotonically increased as they're
|
||||
collected from the hardware.
|
||||
|
||||
A typical example of the logic that handle status and statistics is::
|
||||
|
||||
static int foo_get_status_and_stats(struct dvb_frontend *fe)
|
||||
{
|
||||
struct foo_state *state = fe->demodulator_priv;
|
||||
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
|
||||
|
||||
int rc;
|
||||
enum fe_status *status;
|
||||
|
||||
/* Both status and strength are always available */
|
||||
rc = foo_read_status(fe, &status);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = foo_read_strength(fe);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Check if CNR is available */
|
||||
if (!(fe->status & FE_HAS_CARRIER))
|
||||
return 0;
|
||||
|
||||
rc = foo_read_cnr(fe);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Check if pre-BER stats are available */
|
||||
if (!(fe->status & FE_HAS_VITERBI))
|
||||
return 0;
|
||||
|
||||
rc = foo_get_pre_ber(fe);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Check if post-BER stats are available */
|
||||
if (!(fe->status & FE_HAS_SYNC))
|
||||
return 0;
|
||||
|
||||
rc = foo_get_post_ber(fe);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
}
|
||||
|
||||
static const struct dvb_frontend_ops ops = {
|
||||
/* ... */
|
||||
.read_status = foo_get_status_and_stats,
|
||||
};
|
||||
|
||||
Statistics collect
|
||||
^^^^^^^^^^^^^^^^^^
|
||||
|
||||
On almost all frontend hardware, the bit and byte counts are stored by
|
||||
the hardware after a certain amount of time or after the total bit/block
|
||||
counter reaches a certain value (usually programable), for example, on
|
||||
every 1000 ms or after receiving 1,000,000 bits.
|
||||
|
||||
So, if you read the registers too soon, you'll end by reading the same
|
||||
value as in the previous reading, causing the monotonic value to be
|
||||
incremented too often.
|
||||
|
||||
Drivers should take the responsibility to avoid too often reads. That
|
||||
can be done using two approaches:
|
||||
|
||||
if the driver have a bit that indicates when a collected data is ready
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
Driver should check such bit before making the statistics available.
|
||||
|
||||
An example of such behavior can be found at this code snippet (adapted
|
||||
from mb86a20s driver's logic)::
|
||||
|
||||
static int foo_get_pre_ber(struct dvb_frontend *fe)
|
||||
{
|
||||
struct foo_state *state = fe->demodulator_priv;
|
||||
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
|
||||
int rc, bit_error;
|
||||
|
||||
/* Check if the BER measures are already available */
|
||||
rc = foo_read_u8(state, 0x54);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
if (!rc)
|
||||
return 0;
|
||||
|
||||
/* Read Bit Error Count */
|
||||
bit_error = foo_read_u32(state, 0x55);
|
||||
if (bit_error < 0)
|
||||
return bit_error;
|
||||
|
||||
/* Read Total Bit Count */
|
||||
rc = foo_read_u32(state, 0x51);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
c->pre_bit_error.stat[0].scale = FE_SCALE_COUNTER;
|
||||
c->pre_bit_error.stat[0].uvalue += bit_error;
|
||||
c->pre_bit_count.stat[0].scale = FE_SCALE_COUNTER;
|
||||
c->pre_bit_count.stat[0].uvalue += rc;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
If the driver doesn't provide a statistics available check bit
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
A few devices, however, may not provide a way to check if the stats are
|
||||
available (or the way to check it is unknown). They may not even provide
|
||||
a way to directly read the total number of bits or blocks.
|
||||
|
||||
On those devices, the driver need to ensure that it won't be reading from
|
||||
the register too often and/or estimate the total number of bits/blocks.
|
||||
|
||||
On such drivers, a typical routine to get statistics would be like
|
||||
(adapted from dib8000 driver's logic)::
|
||||
|
||||
struct foo_state {
|
||||
/* ... */
|
||||
|
||||
unsigned long per_jiffies_stats;
|
||||
}
|
||||
|
||||
static int foo_get_pre_ber(struct dvb_frontend *fe)
|
||||
{
|
||||
struct foo_state *state = fe->demodulator_priv;
|
||||
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
|
||||
int rc, bit_error;
|
||||
u64 bits;
|
||||
|
||||
/* Check if time for stats was elapsed */
|
||||
if (!time_after(jiffies, state->per_jiffies_stats))
|
||||
return 0;
|
||||
|
||||
/* Next stat should be collected in 1000 ms */
|
||||
state->per_jiffies_stats = jiffies + msecs_to_jiffies(1000);
|
||||
|
||||
/* Read Bit Error Count */
|
||||
bit_error = foo_read_u32(state, 0x55);
|
||||
if (bit_error < 0)
|
||||
return bit_error;
|
||||
|
||||
/*
|
||||
* On this particular frontend, there's no register that
|
||||
* would provide the number of bits per 1000ms sample. So,
|
||||
* some function would calculate it based on DTV properties
|
||||
*/
|
||||
bits = get_number_of_bits_per_1000ms(fe);
|
||||
|
||||
c->pre_bit_error.stat[0].scale = FE_SCALE_COUNTER;
|
||||
c->pre_bit_error.stat[0].uvalue += bit_error;
|
||||
c->pre_bit_count.stat[0].scale = FE_SCALE_COUNTER;
|
||||
c->pre_bit_count.stat[0].uvalue += bits;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Please notice that, on both cases, we're getting the statistics using the
|
||||
:c:type:`dvb_frontend_ops` ``.read_status`` callback. The rationale is that
|
||||
the frontend core will automatically call this function periodically
|
||||
(usually, 3 times per second, when the frontend is locked).
|
||||
|
||||
That warrants that we won't miss to collect a counter and increment the
|
||||
monotonic stats at the right time.
|
||||
|
||||
Digital TV Frontend functions and types
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
.. kernel-doc:: drivers/media/dvb-core/dvb_frontend.h
|
||||
|
||||
|
||||
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@ -147,3 +147,9 @@ appropriately. The generic error codes are described at the
|
||||
EINVAL
|
||||
The struct :c:type:`v4l2_format` ``type`` field is
|
||||
invalid or the requested buffer type not supported.
|
||||
|
||||
EBUSY
|
||||
The device is busy and cannot change the format. This could be
|
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because or the device is streaming or buffers are allocated or
|
||||
queued to the driver. Relevant for :ref:`VIDIOC_S_FMT
|
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<VIDIOC_G_FMT>` only.
|
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||||
@ -607,8 +607,9 @@ References
|
||||
|
||||
Authors
|
||||
-------
|
||||
Steve Longerbeam <steve_longerbeam@mentor.com>
|
||||
Philipp Zabel <kernel@pengutronix.de>
|
||||
Russell King <linux@armlinux.org.uk>
|
||||
|
||||
- Steve Longerbeam <steve_longerbeam@mentor.com>
|
||||
- Philipp Zabel <kernel@pengutronix.de>
|
||||
- Russell King <linux@armlinux.org.uk>
|
||||
|
||||
Copyright (C) 2012-2017 Mentor Graphics Inc.
|
||||
|
||||
@ -41,6 +41,7 @@ For more details see the file COPYING in the source distribution of Linux.
|
||||
cx88
|
||||
davinci-vpbe
|
||||
fimc
|
||||
imx
|
||||
ivtv
|
||||
max2175
|
||||
meye
|
||||
|
||||
@ -228,7 +228,7 @@ Learning on the device port should be enabled, as well as learning_sync:
|
||||
bridge link set dev DEV learning on self
|
||||
bridge link set dev DEV learning_sync on self
|
||||
|
||||
Learning_sync attribute enables syncing of the learned/forgotton FDB entry to
|
||||
Learning_sync attribute enables syncing of the learned/forgotten FDB entry to
|
||||
the bridge's FDB. It's possible, but not optimal, to enable learning on the
|
||||
device port and on the bridge port, and disable learning_sync.
|
||||
|
||||
@ -245,7 +245,7 @@ the responsibility of the port driver/device to age out these entries. If the
|
||||
port device supports ageing, when the FDB entry expires, it will notify the
|
||||
driver which in turn will notify the bridge with SWITCHDEV_FDB_DEL. If the
|
||||
device does not support ageing, the driver can simulate ageing using a
|
||||
garbage collection timer to monitor FBD entries. Expired entries will be
|
||||
garbage collection timer to monitor FDB entries. Expired entries will be
|
||||
notified to the bridge using SWITCHDEV_FDB_DEL. See rocker driver for
|
||||
example of driver running ageing timer.
|
||||
|
||||
|
||||
@ -435,7 +435,8 @@ drivers/base/power/runtime.c and include/linux/pm_runtime.h:
|
||||
PM status to 'suspended' and update its parent's counter of 'active'
|
||||
children as appropriate (it is only valid to use this function if
|
||||
'power.runtime_error' is set or 'power.disable_depth' is greater than
|
||||
zero)
|
||||
zero); it will fail and return an error code if the device has a child
|
||||
which is active and the 'power.ignore_children' flag is unset
|
||||
|
||||
bool pm_runtime_active(struct device *dev);
|
||||
- return true if the device's runtime PM status is 'active' or its
|
||||
|
||||
@ -58,20 +58,23 @@ Symbols/Function Pointers
|
||||
%ps versatile_init
|
||||
%pB prev_fn_of_versatile_init+0x88/0x88
|
||||
|
||||
For printing symbols and function pointers. The ``S`` and ``s`` specifiers
|
||||
result in the symbol name with (``S``) or without (``s``) offsets. Where
|
||||
this is used on a kernel without KALLSYMS - the symbol address is
|
||||
printed instead.
|
||||
The ``F`` and ``f`` specifiers are for printing function pointers,
|
||||
for example, f->func, &gettimeofday. They have the same result as
|
||||
``S`` and ``s`` specifiers. But they do an extra conversion on
|
||||
ia64, ppc64 and parisc64 architectures where the function pointers
|
||||
are actually function descriptors.
|
||||
|
||||
The ``S`` and ``s`` specifiers can be used for printing symbols
|
||||
from direct addresses, for example, __builtin_return_address(0),
|
||||
(void *)regs->ip. They result in the symbol name with (``S``) or
|
||||
without (``s``) offsets. If KALLSYMS are disabled then the symbol
|
||||
address is printed instead.
|
||||
|
||||
The ``B`` specifier results in the symbol name with offsets and should be
|
||||
used when printing stack backtraces. The specifier takes into
|
||||
consideration the effect of compiler optimisations which may occur
|
||||
when tail-call``s are used and marked with the noreturn GCC attribute.
|
||||
|
||||
On ia64, ppc64 and parisc64 architectures function pointers are
|
||||
actually function descriptors which must first be resolved. The ``F`` and
|
||||
``f`` specifiers perform this resolution and then provide the same
|
||||
functionality as the ``S`` and ``s`` specifiers.
|
||||
|
||||
Kernel Pointers
|
||||
===============
|
||||
|
||||
@ -35,9 +35,34 @@ Table : Subdirectories in /proc/sys/net
|
||||
bpf_jit_enable
|
||||
--------------
|
||||
|
||||
This enables Berkeley Packet Filter Just in Time compiler.
|
||||
Currently supported on x86_64 architecture, bpf_jit provides a framework
|
||||
to speed packet filtering, the one used by tcpdump/libpcap for example.
|
||||
This enables the BPF Just in Time (JIT) compiler. BPF is a flexible
|
||||
and efficient infrastructure allowing to execute bytecode at various
|
||||
hook points. It is used in a number of Linux kernel subsystems such
|
||||
as networking (e.g. XDP, tc), tracing (e.g. kprobes, uprobes, tracepoints)
|
||||
and security (e.g. seccomp). LLVM has a BPF back end that can compile
|
||||
restricted C into a sequence of BPF instructions. After program load
|
||||
through bpf(2) and passing a verifier in the kernel, a JIT will then
|
||||
translate these BPF proglets into native CPU instructions. There are
|
||||
two flavors of JITs, the newer eBPF JIT currently supported on:
|
||||
- x86_64
|
||||
- arm64
|
||||
- ppc64
|
||||
- sparc64
|
||||
- mips64
|
||||
- s390x
|
||||
|
||||
And the older cBPF JIT supported on the following archs:
|
||||
- arm
|
||||
- mips
|
||||
- ppc
|
||||
- sparc
|
||||
|
||||
eBPF JITs are a superset of cBPF JITs, meaning the kernel will
|
||||
migrate cBPF instructions into eBPF instructions and then JIT
|
||||
compile them transparently. Older cBPF JITs can only translate
|
||||
tcpdump filters, seccomp rules, etc, but not mentioned eBPF
|
||||
programs loaded through bpf(2).
|
||||
|
||||
Values :
|
||||
0 - disable the JIT (default value)
|
||||
1 - enable the JIT
|
||||
@ -46,9 +71,9 @@ Values :
|
||||
bpf_jit_harden
|
||||
--------------
|
||||
|
||||
This enables hardening for the Berkeley Packet Filter Just in Time compiler.
|
||||
Supported are eBPF JIT backends. Enabling hardening trades off performance,
|
||||
but can mitigate JIT spraying.
|
||||
This enables hardening for the BPF JIT compiler. Supported are eBPF
|
||||
JIT backends. Enabling hardening trades off performance, but can
|
||||
mitigate JIT spraying.
|
||||
Values :
|
||||
0 - disable JIT hardening (default value)
|
||||
1 - enable JIT hardening for unprivileged users only
|
||||
@ -57,11 +82,11 @@ Values :
|
||||
bpf_jit_kallsyms
|
||||
----------------
|
||||
|
||||
When Berkeley Packet Filter Just in Time compiler is enabled, then compiled
|
||||
images are unknown addresses to the kernel, meaning they neither show up in
|
||||
traces nor in /proc/kallsyms. This enables export of these addresses, which
|
||||
can be used for debugging/tracing. If bpf_jit_harden is enabled, this feature
|
||||
is disabled.
|
||||
When BPF JIT compiler is enabled, then compiled images are unknown
|
||||
addresses to the kernel, meaning they neither show up in traces nor
|
||||
in /proc/kallsyms. This enables export of these addresses, which can
|
||||
be used for debugging/tracing. If bpf_jit_harden is enabled, this
|
||||
feature is disabled.
|
||||
Values :
|
||||
0 - disable JIT kallsyms export (default value)
|
||||
1 - enable JIT kallsyms export for privileged users only
|
||||
|
||||
28
MAINTAINERS
28
MAINTAINERS
@ -1161,7 +1161,7 @@ M: Brendan Higgins <brendanhiggins@google.com>
|
||||
R: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
R: Joel Stanley <joel@jms.id.au>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
L: openbmc@lists.ozlabs.org
|
||||
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: drivers/irqchip/irq-aspeed-i2c-ic.c
|
||||
F: drivers/i2c/busses/i2c-aspeed.c
|
||||
@ -5090,12 +5090,20 @@ M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: include/linux/phy.h
|
||||
F: include/linux/phy_fixed.h
|
||||
F: drivers/net/phy/
|
||||
F: Documentation/ABI/testing/sysfs-bus-mdio
|
||||
F: Documentation/devicetree/bindings/net/mdio*
|
||||
F: Documentation/networking/phy.txt
|
||||
F: drivers/net/phy/
|
||||
F: drivers/of/of_mdio.c
|
||||
F: drivers/of/of_net.c
|
||||
F: include/linux/*mdio*.h
|
||||
F: include/linux/of_net.h
|
||||
F: include/linux/phy.h
|
||||
F: include/linux/phy_fixed.h
|
||||
F: include/linux/platform_data/mdio-gpio.h
|
||||
F: include/trace/events/mdio.h
|
||||
F: include/uapi/linux/mdio.h
|
||||
F: include/uapi/linux/mii.h
|
||||
|
||||
EXT2 FILE SYSTEM
|
||||
M: Jan Kara <jack@suse.com>
|
||||
@ -5826,7 +5834,7 @@ F: drivers/staging/greybus/spi.c
|
||||
F: drivers/staging/greybus/spilib.c
|
||||
F: drivers/staging/greybus/spilib.h
|
||||
|
||||
GREYBUS LOOBACK/TIME PROTOCOLS DRIVERS
|
||||
GREYBUS LOOPBACK/TIME PROTOCOLS DRIVERS
|
||||
M: Bryan O'Donoghue <pure.logic@nexus-software.ie>
|
||||
S: Maintained
|
||||
F: drivers/staging/greybus/loopback.c
|
||||
@ -7102,7 +7110,6 @@ M: Marc Zyngier <marc.zyngier@arm.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
|
||||
T: git git://git.infradead.org/users/jcooper/linux.git irqchip/core
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/
|
||||
F: drivers/irqchip/
|
||||
|
||||
@ -10375,7 +10382,7 @@ L: linux-gpio@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/pinctrl/
|
||||
F: Documentation/pinctrl.txt
|
||||
F: Documentation/driver-api/pinctl.rst
|
||||
F: drivers/pinctrl/
|
||||
F: include/linux/pinctrl/
|
||||
|
||||
@ -13996,6 +14003,7 @@ F: drivers/block/virtio_blk.c
|
||||
F: include/linux/virtio*.h
|
||||
F: include/uapi/linux/virtio_*.h
|
||||
F: drivers/crypto/virtio/
|
||||
F: mm/balloon_compaction.c
|
||||
|
||||
VIRTIO CRYPTO DRIVER
|
||||
M: Gonglei <arei.gonglei@huawei.com>
|
||||
@ -14210,6 +14218,12 @@ F: drivers/watchdog/
|
||||
F: include/linux/watchdog.h
|
||||
F: include/uapi/linux/watchdog.h
|
||||
|
||||
WHISKEYCOVE PMIC GPIO DRIVER
|
||||
M: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-wcove.c
|
||||
|
||||
WIIMOTE HID DRIVER
|
||||
M: David Herrmann <dh.herrmann@googlemail.com>
|
||||
L: linux-input@vger.kernel.org
|
||||
|
||||
13
Makefile
13
Makefile
@ -1,7 +1,7 @@
|
||||
VERSION = 4
|
||||
PATCHLEVEL = 13
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Fearless Coyote
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@ -396,7 +396,7 @@ LINUXINCLUDE := \
|
||||
KBUILD_CPPFLAGS := -D__KERNEL__
|
||||
|
||||
KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
|
||||
-fno-strict-aliasing -fno-common \
|
||||
-fno-strict-aliasing -fno-common -fshort-wchar \
|
||||
-Werror-implicit-function-declaration \
|
||||
-Wno-format-security \
|
||||
-std=gnu89 $(call cc-option,-fno-PIE)
|
||||
@ -442,7 +442,7 @@ export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn \
|
||||
# ===========================================================================
|
||||
# Rules shared between *config targets and build targets
|
||||
|
||||
# Basic helpers built in scripts/
|
||||
# Basic helpers built in scripts/basic/
|
||||
PHONY += scripts_basic
|
||||
scripts_basic:
|
||||
$(Q)$(MAKE) $(build)=scripts/basic
|
||||
@ -505,7 +505,7 @@ ifeq ($(KBUILD_EXTMOD),)
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
# install and module_install need also be processed one by one
|
||||
# install and modules_install need also be processed one by one
|
||||
ifneq ($(filter install,$(MAKECMDGOALS)),)
|
||||
ifneq ($(filter modules_install,$(MAKECMDGOALS)),)
|
||||
mixed-targets := 1
|
||||
@ -964,7 +964,7 @@ export KBUILD_VMLINUX_MAIN := $(core-y) $(libs-y2) $(drivers-y) $(net-y) $(virt-
|
||||
export KBUILD_VMLINUX_LIBS := $(libs-y1)
|
||||
export KBUILD_LDS := arch/$(SRCARCH)/kernel/vmlinux.lds
|
||||
export LDFLAGS_vmlinux
|
||||
# used by scripts/pacmage/Makefile
|
||||
# used by scripts/package/Makefile
|
||||
export KBUILD_ALLDIRS := $(sort $(filter-out arch/%,$(vmlinux-alldirs)) arch Documentation include samples scripts tools)
|
||||
|
||||
vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_INIT) $(KBUILD_VMLINUX_MAIN) $(KBUILD_VMLINUX_LIBS)
|
||||
@ -992,7 +992,7 @@ include/generated/autoksyms.h: FORCE
|
||||
ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(SRCARCH)/Makefile.postlink)
|
||||
|
||||
# Final link of vmlinux with optional arch pass after final link
|
||||
cmd_link-vmlinux = \
|
||||
cmd_link-vmlinux = \
|
||||
$(CONFIG_SHELL) $< $(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) ; \
|
||||
$(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true)
|
||||
|
||||
@ -1184,6 +1184,7 @@ PHONY += kselftest
|
||||
kselftest:
|
||||
$(Q)$(MAKE) -C tools/testing/selftests run_tests
|
||||
|
||||
PHONY += kselftest-clean
|
||||
kselftest-clean:
|
||||
$(Q)$(MAKE) -C tools/testing/selftests clean
|
||||
|
||||
|
||||
@ -96,7 +96,6 @@ menu "ARC Architecture Configuration"
|
||||
|
||||
menu "ARC Platform/SoC/Board"
|
||||
|
||||
source "arch/arc/plat-sim/Kconfig"
|
||||
source "arch/arc/plat-tb10x/Kconfig"
|
||||
source "arch/arc/plat-axs10x/Kconfig"
|
||||
#New platform adds here
|
||||
|
||||
@ -107,7 +107,7 @@ core-y += arch/arc/
|
||||
# w/o this dtb won't embed into kernel binary
|
||||
core-y += arch/arc/boot/dts/
|
||||
|
||||
core-$(CONFIG_ARC_PLAT_SIM) += arch/arc/plat-sim/
|
||||
core-y += arch/arc/plat-sim/
|
||||
core-$(CONFIG_ARC_PLAT_TB10X) += arch/arc/plat-tb10x/
|
||||
core-$(CONFIG_ARC_PLAT_AXS10X) += arch/arc/plat-axs10x/
|
||||
core-$(CONFIG_ARC_PLAT_EZNPS) += arch/arc/plat-eznps/
|
||||
|
||||
@ -15,15 +15,15 @@
|
||||
|
||||
/ {
|
||||
compatible = "snps,arc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpu_card {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ranges = <0x00000000 0xf0000000 0x10000000>;
|
||||
ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
|
||||
|
||||
core_clk: core_clk {
|
||||
#clock-cells = <0>;
|
||||
@ -91,23 +91,21 @@
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0xe0012000 0x200 >;
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&core_intc>;
|
||||
interrupts = < 7 >;
|
||||
};
|
||||
|
||||
memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x80000000 0x20000000>;
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */
|
||||
/* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
|
||||
reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
/*
|
||||
* We just move frame buffer area to the very end of
|
||||
@ -118,7 +116,7 @@
|
||||
*/
|
||||
frame_buffer: frame_buffer@9e000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x9e000000 0x2000000>;
|
||||
reg = <0x0 0x9e000000 0x0 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
@ -14,15 +14,15 @@
|
||||
|
||||
/ {
|
||||
compatible = "snps,arc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpu_card {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ranges = <0x00000000 0xf0000000 0x10000000>;
|
||||
ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
|
||||
|
||||
core_clk: core_clk {
|
||||
#clock-cells = <0>;
|
||||
@ -94,30 +94,29 @@
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0xe0012000 0x200 >;
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&core_intc>;
|
||||
interrupts = < 24 >;
|
||||
};
|
||||
|
||||
memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x80000000 0x40000000>;
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512MiB */
|
||||
/* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
|
||||
reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
|
||||
0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
/*
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xAz).
|
||||
*/
|
||||
frame_buffer: frame_buffer@be000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0xbe000000 0x2000000>;
|
||||
reg = <0x0 0xbe000000 0x0 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
@ -14,15 +14,15 @@
|
||||
|
||||
/ {
|
||||
compatible = "snps,arc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpu_card {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ranges = <0x00000000 0xf0000000 0x10000000>;
|
||||
ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
|
||||
|
||||
core_clk: core_clk {
|
||||
#clock-cells = <0>;
|
||||
@ -100,30 +100,29 @@
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0xe0012000 0x200 >;
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&idu_intc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x80000000 0x40000000>;
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512MiB */
|
||||
/* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
|
||||
reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
|
||||
0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
/*
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xAz).
|
||||
*/
|
||||
frame_buffer: frame_buffer@be000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0xbe000000 0x2000000>;
|
||||
reg = <0x0 0xbe000000 0x0 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0xe0000000 0x10000000>;
|
||||
ranges = <0x00000000 0x0 0xe0000000 0x10000000>;
|
||||
interrupt-parent = <&mb_intc>;
|
||||
|
||||
i2sclk: i2sclk@100a0 {
|
||||
|
||||
@ -21,7 +21,6 @@ CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs"
|
||||
CONFIG_PREEMPT=y
|
||||
|
||||
@ -23,7 +23,6 @@ CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs_idu"
|
||||
|
||||
@ -39,7 +39,6 @@ CONFIG_IP_PNP=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
|
||||
@ -23,7 +23,6 @@ CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
|
||||
@ -26,7 +26,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs"
|
||||
CONFIG_PREEMPT=y
|
||||
|
||||
@ -24,7 +24,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu"
|
||||
|
||||
@ -23,7 +23,6 @@ CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci"
|
||||
# CONFIG_COMPACTION is not set
|
||||
CONFIG_NET=y
|
||||
|
||||
@ -23,7 +23,6 @@ CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs"
|
||||
# CONFIG_COMPACTION is not set
|
||||
|
||||
@ -18,7 +18,6 @@ CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_PLAT_SIM=y
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_ARC_TIMERS_64BIT is not set
|
||||
|
||||
@ -38,7 +38,6 @@ CONFIG_IP_MULTICAST=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
|
||||
@ -96,7 +96,9 @@ extern unsigned long perip_base, perip_end;
|
||||
#define ARC_REG_SLC_FLUSH 0x904
|
||||
#define ARC_REG_SLC_INVALIDATE 0x905
|
||||
#define ARC_REG_SLC_RGN_START 0x914
|
||||
#define ARC_REG_SLC_RGN_START1 0x915
|
||||
#define ARC_REG_SLC_RGN_END 0x916
|
||||
#define ARC_REG_SLC_RGN_END1 0x917
|
||||
|
||||
/* Bit val in SLC_CONTROL */
|
||||
#define SLC_CTRL_DIS 0x001
|
||||
|
||||
@ -94,6 +94,8 @@ static inline int is_pae40_enabled(void)
|
||||
return IS_ENABLED(CONFIG_ARC_HAS_PAE40);
|
||||
}
|
||||
|
||||
extern int pae40_exist_but_not_enab(void);
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif
|
||||
|
||||
@ -75,10 +75,13 @@ void arc_init_IRQ(void)
|
||||
* Set a default priority for all available interrupts to prevent
|
||||
* switching of register banks if Fast IRQ and multiple register banks
|
||||
* are supported by CPU.
|
||||
* Also disable all IRQ lines so faulty external hardware won't
|
||||
* trigger interrupt that kernel is not ready to handle.
|
||||
*/
|
||||
for (i = NR_EXCEPTIONS; i < irq_bcr.irqs + NR_EXCEPTIONS; i++) {
|
||||
write_aux_reg(AUX_IRQ_SELECT, i);
|
||||
write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);
|
||||
write_aux_reg(AUX_IRQ_ENABLE, 0);
|
||||
}
|
||||
|
||||
/* setup status32, don't enable intr yet as kernel doesn't want */
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
*/
|
||||
void arc_init_IRQ(void)
|
||||
{
|
||||
int level_mask = 0;
|
||||
int level_mask = 0, i;
|
||||
|
||||
/* Is timer high priority Interrupt (Level2 in ARCompact jargon) */
|
||||
level_mask |= IS_ENABLED(CONFIG_ARC_COMPACT_IRQ_LEVELS) << TIMER0_IRQ;
|
||||
@ -40,6 +40,18 @@ void arc_init_IRQ(void)
|
||||
|
||||
if (level_mask)
|
||||
pr_info("Level-2 interrupts bitset %x\n", level_mask);
|
||||
|
||||
/*
|
||||
* Disable all IRQ lines so faulty external hardware won't
|
||||
* trigger interrupt that kernel is not ready to handle.
|
||||
*/
|
||||
for (i = TIMER0_IRQ; i < NR_CPU_IRQS; i++) {
|
||||
unsigned int ienb;
|
||||
|
||||
ienb = read_aux_reg(AUX_IENABLE);
|
||||
ienb &= ~(1 << i);
|
||||
write_aux_reg(AUX_IENABLE, ienb);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@ -665,6 +665,7 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op)
|
||||
static DEFINE_SPINLOCK(lock);
|
||||
unsigned long flags;
|
||||
unsigned int ctrl;
|
||||
phys_addr_t end;
|
||||
|
||||
spin_lock_irqsave(&lock, flags);
|
||||
|
||||
@ -694,8 +695,19 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op)
|
||||
* END needs to be setup before START (latter triggers the operation)
|
||||
* END can't be same as START, so add (l2_line_sz - 1) to sz
|
||||
*/
|
||||
write_aux_reg(ARC_REG_SLC_RGN_END, (paddr + sz + l2_line_sz - 1));
|
||||
write_aux_reg(ARC_REG_SLC_RGN_START, paddr);
|
||||
end = paddr + sz + l2_line_sz - 1;
|
||||
if (is_pae40_enabled())
|
||||
write_aux_reg(ARC_REG_SLC_RGN_END1, upper_32_bits(end));
|
||||
|
||||
write_aux_reg(ARC_REG_SLC_RGN_END, lower_32_bits(end));
|
||||
|
||||
if (is_pae40_enabled())
|
||||
write_aux_reg(ARC_REG_SLC_RGN_START1, upper_32_bits(paddr));
|
||||
|
||||
write_aux_reg(ARC_REG_SLC_RGN_START, lower_32_bits(paddr));
|
||||
|
||||
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
|
||||
read_aux_reg(ARC_REG_SLC_CTRL);
|
||||
|
||||
while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY);
|
||||
|
||||
@ -1111,6 +1123,13 @@ noinline void __init arc_ioc_setup(void)
|
||||
__dc_enable();
|
||||
}
|
||||
|
||||
/*
|
||||
* Cache related boot time checks/setups only needed on master CPU:
|
||||
* - Geometry checks (kernel build and hardware agree: e.g. L1_CACHE_BYTES)
|
||||
* Assume SMP only, so all cores will have same cache config. A check on
|
||||
* one core suffices for all
|
||||
* - IOC setup / dma callbacks only need to be done once
|
||||
*/
|
||||
void __init arc_cache_init_master(void)
|
||||
{
|
||||
unsigned int __maybe_unused cpu = smp_processor_id();
|
||||
@ -1190,12 +1209,27 @@ void __ref arc_cache_init(void)
|
||||
|
||||
printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
|
||||
|
||||
/*
|
||||
* Only master CPU needs to execute rest of function:
|
||||
* - Assume SMP so all cores will have same cache config so
|
||||
* any geomtry checks will be same for all
|
||||
* - IOC setup / dma callbacks only need to be setup once
|
||||
*/
|
||||
if (!cpu)
|
||||
arc_cache_init_master();
|
||||
|
||||
/*
|
||||
* In PAE regime, TLB and cache maintenance ops take wider addresses
|
||||
* And even if PAE is not enabled in kernel, the upper 32-bits still need
|
||||
* to be zeroed to keep the ops sane.
|
||||
* As an optimization for more common !PAE enabled case, zero them out
|
||||
* once at init, rather than checking/setting to 0 for every runtime op
|
||||
*/
|
||||
if (is_isa_arcv2() && pae40_exist_but_not_enab()) {
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_ICACHE))
|
||||
write_aux_reg(ARC_REG_IC_PTAG_HI, 0);
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_DCACHE))
|
||||
write_aux_reg(ARC_REG_DC_PTAG_HI, 0);
|
||||
|
||||
if (l2_line_sz) {
|
||||
write_aux_reg(ARC_REG_SLC_RGN_END1, 0);
|
||||
write_aux_reg(ARC_REG_SLC_RGN_START1, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -153,6 +153,19 @@ static void _dma_cache_sync(phys_addr_t paddr, size_t size,
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* arc_dma_map_page - map a portion of a page for streaming DMA
|
||||
*
|
||||
* Ensure that any data held in the cache is appropriately discarded
|
||||
* or written back.
|
||||
*
|
||||
* The device owns this memory once this call has completed. The CPU
|
||||
* can regain ownership by calling dma_unmap_page().
|
||||
*
|
||||
* Note: while it takes struct page as arg, caller can "abuse" it to pass
|
||||
* a region larger than PAGE_SIZE, provided it is physically contiguous
|
||||
* and this still works correctly
|
||||
*/
|
||||
static dma_addr_t arc_dma_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size, enum dma_data_direction dir,
|
||||
unsigned long attrs)
|
||||
@ -165,6 +178,24 @@ static dma_addr_t arc_dma_map_page(struct device *dev, struct page *page,
|
||||
return plat_phys_to_dma(dev, paddr);
|
||||
}
|
||||
|
||||
/*
|
||||
* arc_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
|
||||
*
|
||||
* After this call, reads by the CPU to the buffer are guaranteed to see
|
||||
* whatever the device wrote there.
|
||||
*
|
||||
* Note: historically this routine was not implemented for ARC
|
||||
*/
|
||||
static void arc_dma_unmap_page(struct device *dev, dma_addr_t handle,
|
||||
size_t size, enum dma_data_direction dir,
|
||||
unsigned long attrs)
|
||||
{
|
||||
phys_addr_t paddr = plat_dma_to_phys(dev, handle);
|
||||
|
||||
if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
|
||||
_dma_cache_sync(paddr, size, dir);
|
||||
}
|
||||
|
||||
static int arc_dma_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir, unsigned long attrs)
|
||||
{
|
||||
@ -178,6 +209,18 @@ static int arc_dma_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
return nents;
|
||||
}
|
||||
|
||||
static void arc_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir,
|
||||
unsigned long attrs)
|
||||
{
|
||||
struct scatterlist *s;
|
||||
int i;
|
||||
|
||||
for_each_sg(sg, s, nents, i)
|
||||
arc_dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir,
|
||||
attrs);
|
||||
}
|
||||
|
||||
static void arc_dma_sync_single_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size, enum dma_data_direction dir)
|
||||
{
|
||||
@ -223,7 +266,9 @@ const struct dma_map_ops arc_dma_ops = {
|
||||
.free = arc_dma_free,
|
||||
.mmap = arc_dma_mmap,
|
||||
.map_page = arc_dma_map_page,
|
||||
.unmap_page = arc_dma_unmap_page,
|
||||
.map_sg = arc_dma_map_sg,
|
||||
.unmap_sg = arc_dma_unmap_sg,
|
||||
.sync_single_for_device = arc_dma_sync_single_for_device,
|
||||
.sync_single_for_cpu = arc_dma_sync_single_for_cpu,
|
||||
.sync_sg_for_cpu = arc_dma_sync_sg_for_cpu,
|
||||
|
||||
@ -104,6 +104,8 @@
|
||||
/* A copy of the ASID from the PID reg is kept in asid_cache */
|
||||
DEFINE_PER_CPU(unsigned int, asid_cache) = MM_CTXT_FIRST_CYCLE;
|
||||
|
||||
static int __read_mostly pae_exists;
|
||||
|
||||
/*
|
||||
* Utility Routine to erase a J-TLB entry
|
||||
* Caller needs to setup Index Reg (manually or via getIndex)
|
||||
@ -784,7 +786,7 @@ void read_decode_mmu_bcr(void)
|
||||
mmu->u_dtlb = mmu4->u_dtlb * 4;
|
||||
mmu->u_itlb = mmu4->u_itlb * 4;
|
||||
mmu->sasid = mmu4->sasid;
|
||||
mmu->pae = mmu4->pae;
|
||||
pae_exists = mmu->pae = mmu4->pae;
|
||||
}
|
||||
}
|
||||
|
||||
@ -809,6 +811,11 @@ char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len)
|
||||
return buf;
|
||||
}
|
||||
|
||||
int pae40_exist_but_not_enab(void)
|
||||
{
|
||||
return pae_exists && !is_pae40_enabled();
|
||||
}
|
||||
|
||||
void arc_mmu_init(void)
|
||||
{
|
||||
char str[256];
|
||||
@ -859,6 +866,9 @@ void arc_mmu_init(void)
|
||||
/* swapper_pg_dir is the pgd for the kernel, used by vmalloc */
|
||||
write_aux_reg(ARC_REG_SCRATCH_DATA0, swapper_pg_dir);
|
||||
#endif
|
||||
|
||||
if (pae40_exist_but_not_enab())
|
||||
write_aux_reg(ARC_REG_TLBPD1HI, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@ -1,13 +0,0 @@
|
||||
#
|
||||
# Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License version 2 as
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
|
||||
menuconfig ARC_PLAT_SIM
|
||||
bool "ARC nSIM based simulation virtual platforms"
|
||||
help
|
||||
Support for nSIM based ARC simulation platforms
|
||||
This includes the standalone nSIM (uart only) vs. System C OSCI VP
|
||||
@ -20,11 +20,14 @@
|
||||
*/
|
||||
|
||||
static const char *simulation_compat[] __initconst = {
|
||||
#ifdef CONFIG_ISA_ARCOMPACT
|
||||
"snps,nsim",
|
||||
"snps,nsim_hs",
|
||||
"snps,nsimosci",
|
||||
#else
|
||||
"snps,nsim_hs",
|
||||
"snps,nsimosci_hs",
|
||||
"snps,zebu_hs",
|
||||
#endif
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
||||
@ -380,7 +380,7 @@ config ARCH_EP93XX
|
||||
bool "EP93xx-based"
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARM_AMBA
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
imply ARM_PATCH_PHYS_VIRT
|
||||
select ARM_VIC
|
||||
select AUTO_ZRELADDR
|
||||
select CLKDEV_LOOKUP
|
||||
|
||||
@ -75,7 +75,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pca0_pins>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
@ -87,7 +87,7 @@
|
||||
compatible = "nxp,pca9555";
|
||||
pinctrl-names = "default";
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
@ -301,25 +301,4 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>;
|
||||
status = "okay";
|
||||
|
||||
/* VPIF capture port */
|
||||
port@0 {
|
||||
vpif_input_ch0: endpoint@0 {
|
||||
reg = <0>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
vpif_input_ch1: endpoint@1 {
|
||||
reg = <1>;
|
||||
bus-width = <8>;
|
||||
data-shift = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
/* VPIF display port */
|
||||
port@1 {
|
||||
vpif_output_ch0: endpoint {
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -318,11 +318,4 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vpif_capture_pins>;
|
||||
status = "okay";
|
||||
|
||||
/* VPIF capture port */
|
||||
port {
|
||||
vpif_ch0: endpoint {
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -68,6 +68,34 @@
|
||||
DM816X_IOPAD(0x0d08, MUX_MODE0) /* USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
|
||||
nandflash_pins: nandflash_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM816X_IOPAD(0x0b38, PULL_UP | MUX_MODE0) /* PINCTRL207 GPMC_CS0*/
|
||||
DM816X_IOPAD(0x0b60, PULL_ENA | MUX_MODE0) /* PINCTRL217 GPMC_ADV_ALE */
|
||||
DM816X_IOPAD(0x0b54, PULL_UP | PULL_ENA | MUX_MODE0) /* PINCTRL214 GPMC_OE_RE */
|
||||
DM816X_IOPAD(0x0b58, PULL_ENA | MUX_MODE0) /* PINCTRL215 GPMC_BE0_CLE */
|
||||
DM816X_IOPAD(0x0b50, PULL_UP | MUX_MODE0) /* PINCTRL213 GPMC_WE */
|
||||
DM816X_IOPAD(0x0b6c, MUX_MODE0) /* PINCTRL220 GPMC_WAIT */
|
||||
DM816X_IOPAD(0x0be4, PULL_ENA | MUX_MODE0) /* PINCTRL250 GPMC_CLK */
|
||||
DM816X_IOPAD(0x0ba4, MUX_MODE0) /* PINCTRL234 GPMC_D0 */
|
||||
DM816X_IOPAD(0x0ba8, MUX_MODE0) /* PINCTRL234 GPMC_D1 */
|
||||
DM816X_IOPAD(0x0bac, MUX_MODE0) /* PINCTRL234 GPMC_D2 */
|
||||
DM816X_IOPAD(0x0bb0, MUX_MODE0) /* PINCTRL234 GPMC_D3 */
|
||||
DM816X_IOPAD(0x0bb4, MUX_MODE0) /* PINCTRL234 GPMC_D4 */
|
||||
DM816X_IOPAD(0x0bb8, MUX_MODE0) /* PINCTRL234 GPMC_D5 */
|
||||
DM816X_IOPAD(0x0bbc, MUX_MODE0) /* PINCTRL234 GPMC_D6 */
|
||||
DM816X_IOPAD(0x0bc0, MUX_MODE0) /* PINCTRL234 GPMC_D7 */
|
||||
DM816X_IOPAD(0x0bc4, MUX_MODE0) /* PINCTRL234 GPMC_D8 */
|
||||
DM816X_IOPAD(0x0bc8, MUX_MODE0) /* PINCTRL234 GPMC_D9 */
|
||||
DM816X_IOPAD(0x0bcc, MUX_MODE0) /* PINCTRL234 GPMC_D10 */
|
||||
DM816X_IOPAD(0x0bd0, MUX_MODE0) /* PINCTRL234 GPMC_D11 */
|
||||
DM816X_IOPAD(0x0bd4, MUX_MODE0) /* PINCTRL234 GPMC_D12 */
|
||||
DM816X_IOPAD(0x0bd8, MUX_MODE0) /* PINCTRL234 GPMC_D13 */
|
||||
DM816X_IOPAD(0x0bdc, MUX_MODE0) /* PINCTRL234 GPMC_D14 */
|
||||
DM816X_IOPAD(0x0be0, MUX_MODE0) /* PINCTRL234 GPMC_D15 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
@ -90,6 +118,8 @@
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nandflash_pins>;
|
||||
|
||||
nand@0,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
@ -98,9 +128,11 @@
|
||||
interrupt-parent = <&gpmc>;
|
||||
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
||||
<1 IRQ_TYPE_NONE>; /* termcount */
|
||||
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
ti,elm-id = <&elm>;
|
||||
nand-bus-width = <16>;
|
||||
gpmc,device-width = <2>;
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
@ -164,7 +196,7 @@
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* At least dm8168-evm rev c won't support multipoint, later may */
|
||||
|
||||
@ -145,7 +145,7 @@
|
||||
};
|
||||
|
||||
elm: elm@48080000 {
|
||||
compatible = "ti,816-elm";
|
||||
compatible = "ti,am3352-elm";
|
||||
ti,hwmods = "elm";
|
||||
reg = <0x48080000 0x2000>;
|
||||
interrupts = <4>;
|
||||
|
||||
@ -190,7 +190,7 @@
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
|
||||
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
|
||||
ti,impedance-control = <0x1f>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
|
||||
dp83867_1: ethernet-phy@3 {
|
||||
@ -198,7 +198,7 @@
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
|
||||
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
|
||||
ti,impedance-control = <0x1f>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -59,6 +59,9 @@
|
||||
compatible = "samsung,exynos4210-audss-clock";
|
||||
reg = <0x03810000 0x0C>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
|
||||
<&clock CLK_SCLK_AUDIO0>, <&clock CLK_SCLK_AUDIO0>;
|
||||
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
|
||||
};
|
||||
|
||||
i2s0: i2s@03830000 {
|
||||
|
||||
@ -266,6 +266,7 @@
|
||||
|
||||
&hdmicec {
|
||||
status = "okay";
|
||||
needs-hpd;
|
||||
};
|
||||
|
||||
&hsi2c_4 {
|
||||
|
||||
@ -297,6 +297,7 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
ranges;
|
||||
|
||||
adc: adc@50030800 {
|
||||
compatible = "fsl,imx25-gcq";
|
||||
|
||||
@ -507,7 +507,7 @@
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
/* PCIe reset */
|
||||
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x030b0
|
||||
MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x030b0
|
||||
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0
|
||||
>;
|
||||
};
|
||||
@ -668,7 +668,7 @@
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>;
|
||||
reset-gpio = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@ -557,6 +557,14 @@
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi4: spi4grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
|
||||
MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
|
||||
MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_tsc2046_pendown: tsc2046_pendown {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x59
|
||||
@ -697,13 +705,5 @@
|
||||
fsl,pins = <
|
||||
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x110b0
|
||||
>;
|
||||
|
||||
pinctrl_spi4: spi4grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
|
||||
MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
|
||||
MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -1126,8 +1126,8 @@
|
||||
};
|
||||
};
|
||||
|
||||
gpu: mali@ffa30000 {
|
||||
compatible = "rockchip,rk3288-mali", "arm,mali-t760", "arm,mali-midgard";
|
||||
gpu: gpu@ffa30000 {
|
||||
compatible = "rockchip,rk3288-mali", "arm,mali-t760";
|
||||
reg = <0xffa30000 0x10000>;
|
||||
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
@ -303,7 +303,7 @@
|
||||
#size-cells = <1>;
|
||||
atmel,smc = <&hsmc>;
|
||||
reg = <0x10000000 0x10000000
|
||||
0x40000000 0x30000000>;
|
||||
0x60000000 0x30000000>;
|
||||
ranges = <0x0 0x0 0x10000000 0x10000000
|
||||
0x1 0x0 0x60000000 0x10000000
|
||||
0x2 0x0 0x70000000 0x10000000
|
||||
@ -1048,18 +1048,18 @@
|
||||
};
|
||||
|
||||
hsmc: hsmc@f8014000 {
|
||||
compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
|
||||
compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
|
||||
reg = <0xf8014000 0x1000>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
clocks = <&hsmc_clk>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
pmecc: ecc-engine@ffffc070 {
|
||||
pmecc: ecc-engine@f8014070 {
|
||||
compatible = "atmel,sama5d2-pmecc";
|
||||
reg = <0xffffc070 0x490>,
|
||||
<0xffffc500 0x100>;
|
||||
reg = <0xf8014070 0x490>,
|
||||
<0xf8014500 0x100>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -44,7 +44,9 @@
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
#include <dt-bindings/clock/sun8i-a83t-ccu.h>
|
||||
#include <dt-bindings/clock/sun8i-r-ccu.h>
|
||||
#include <dt-bindings/reset/sun8i-a83t-ccu.h>
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&gic>;
|
||||
@ -175,8 +177,8 @@
|
||||
compatible = "allwinner,sun8i-a83t-dma";
|
||||
reg = <0x01c02000 0x1000>;
|
||||
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu 21>;
|
||||
resets = <&ccu 7>;
|
||||
clocks = <&ccu CLK_BUS_DMA>;
|
||||
resets = <&ccu RST_BUS_DMA>;
|
||||
#dma-cells = <1>;
|
||||
};
|
||||
|
||||
@ -195,7 +197,7 @@
|
||||
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x01c20800 0x400>;
|
||||
clocks = <&ccu 45>, <&osc24M>, <&osc16Md512>;
|
||||
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc16Md512>;
|
||||
clock-names = "apb", "hosc", "losc";
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
@ -247,8 +249,8 @@
|
||||
"allwinner,sun8i-h3-spdif";
|
||||
reg = <0x01c21000 0x400>;
|
||||
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu 44>, <&ccu 76>;
|
||||
resets = <&ccu 32>;
|
||||
clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
|
||||
resets = <&ccu RST_BUS_SPDIF>;
|
||||
clock-names = "apb", "spdif";
|
||||
dmas = <&dma 2>;
|
||||
dma-names = "tx";
|
||||
@ -263,8 +265,8 @@
|
||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clocks = <&ccu 53>;
|
||||
resets = <&ccu 40>;
|
||||
clocks = <&ccu CLK_BUS_UART0>;
|
||||
resets = <&ccu RST_BUS_UART0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
@ -394,7 +394,7 @@
|
||||
emac: ethernet@1c30000 {
|
||||
compatible = "allwinner,sun8i-h3-emac";
|
||||
syscon = <&syscon>;
|
||||
reg = <0x01c30000 0x104>;
|
||||
reg = <0x01c30000 0x10000>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
resets = <&ccu RST_BUS_EMAC>;
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
};
|
||||
|
||||
ð0 {
|
||||
phy-connection-type = "rgmii";
|
||||
phy-connection-type = "rgmii-id";
|
||||
phy-handle = <ð0_phy>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -148,7 +148,8 @@ static inline void tlb_flush_mmu(struct mmu_gather *tlb)
|
||||
}
|
||||
|
||||
static inline void
|
||||
tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end)
|
||||
arch_tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm,
|
||||
unsigned long start, unsigned long end)
|
||||
{
|
||||
tlb->mm = mm;
|
||||
tlb->fullmm = !(start | (end+1));
|
||||
@ -166,8 +167,14 @@ tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start
|
||||
}
|
||||
|
||||
static inline void
|
||||
tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
|
||||
arch_tlb_finish_mmu(struct mmu_gather *tlb,
|
||||
unsigned long start, unsigned long end, bool force)
|
||||
{
|
||||
if (force) {
|
||||
tlb->range_start = start;
|
||||
tlb->range_end = end;
|
||||
}
|
||||
|
||||
tlb_flush_mmu(tlb);
|
||||
|
||||
/* keep the page table cache within bounds */
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
menuconfig ARCH_AT91
|
||||
bool "Atmel SoCs"
|
||||
depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_CPU_SUSPEND if PM && ARCH_MULTI_V7
|
||||
select COMMON_CLK_AT91
|
||||
select GPIOLIB
|
||||
select PINCTRL
|
||||
|
||||
@ -608,6 +608,9 @@ static void __init at91_pm_init(void (*pm_idle)(void))
|
||||
|
||||
void __init at91rm9200_pm_init(void)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_SOC_AT91RM9200))
|
||||
return;
|
||||
|
||||
at91_dt_ramc();
|
||||
|
||||
/*
|
||||
@ -620,18 +623,27 @@ void __init at91rm9200_pm_init(void)
|
||||
|
||||
void __init at91sam9_pm_init(void)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
|
||||
return;
|
||||
|
||||
at91_dt_ramc();
|
||||
at91_pm_init(at91sam9_idle);
|
||||
}
|
||||
|
||||
void __init sama5_pm_init(void)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_SOC_SAMA5))
|
||||
return;
|
||||
|
||||
at91_dt_ramc();
|
||||
at91_pm_init(NULL);
|
||||
}
|
||||
|
||||
void __init sama5d2_pm_init(void)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
|
||||
return;
|
||||
|
||||
at91_pm_backup_init();
|
||||
sama5_pm_init();
|
||||
}
|
||||
|
||||
@ -1166,7 +1166,7 @@ static struct tvp514x_platform_data tvp5146_pdata = {
|
||||
|
||||
#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
|
||||
|
||||
static const struct vpif_input da850_ch0_inputs[] = {
|
||||
static struct vpif_input da850_ch0_inputs[] = {
|
||||
{
|
||||
.input = {
|
||||
.index = 0,
|
||||
@ -1181,7 +1181,7 @@ static const struct vpif_input da850_ch0_inputs[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static const struct vpif_input da850_ch1_inputs[] = {
|
||||
static struct vpif_input da850_ch1_inputs[] = {
|
||||
{
|
||||
.input = {
|
||||
.index = 0,
|
||||
|
||||
@ -218,6 +218,15 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
|
||||
}
|
||||
EXPORT_SYMBOL(clk_set_parent);
|
||||
|
||||
struct clk *clk_get_parent(struct clk *clk)
|
||||
{
|
||||
if (!clk)
|
||||
return NULL;
|
||||
|
||||
return clk->parent;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get_parent);
|
||||
|
||||
int clk_register(struct clk *clk)
|
||||
{
|
||||
if (clk == NULL || IS_ERR(clk))
|
||||
|
||||
@ -475,6 +475,26 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
|
||||
}
|
||||
EXPORT_SYMBOL(clk_set_rate);
|
||||
|
||||
long clk_round_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
WARN_ON(clk);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_round_rate);
|
||||
|
||||
int clk_set_parent(struct clk *clk, struct clk *parent)
|
||||
{
|
||||
WARN_ON(clk);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_set_parent);
|
||||
|
||||
struct clk *clk_get_parent(struct clk *clk)
|
||||
{
|
||||
return clk->parent;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get_parent);
|
||||
|
||||
|
||||
static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
|
||||
static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
|
||||
|
||||
@ -95,8 +95,10 @@ static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
|
||||
}
|
||||
|
||||
static inline void __indirect_writesb(volatile void __iomem *bus_addr,
|
||||
const u8 *vaddr, int count)
|
||||
const void *p, int count)
|
||||
{
|
||||
const u8 *vaddr = p;
|
||||
|
||||
while (count--)
|
||||
writeb(*vaddr++, bus_addr);
|
||||
}
|
||||
@ -118,8 +120,10 @@ static inline void __indirect_writew(u16 value, volatile void __iomem *p)
|
||||
}
|
||||
|
||||
static inline void __indirect_writesw(volatile void __iomem *bus_addr,
|
||||
const u16 *vaddr, int count)
|
||||
const void *p, int count)
|
||||
{
|
||||
const u16 *vaddr = p;
|
||||
|
||||
while (count--)
|
||||
writew(*vaddr++, bus_addr);
|
||||
}
|
||||
@ -137,8 +141,9 @@ static inline void __indirect_writel(u32 value, volatile void __iomem *p)
|
||||
}
|
||||
|
||||
static inline void __indirect_writesl(volatile void __iomem *bus_addr,
|
||||
const u32 *vaddr, int count)
|
||||
const void *p, int count)
|
||||
{
|
||||
const u32 *vaddr = p;
|
||||
while (count--)
|
||||
writel(*vaddr++, bus_addr);
|
||||
}
|
||||
@ -160,8 +165,10 @@ static inline u8 __indirect_readb(const volatile void __iomem *p)
|
||||
}
|
||||
|
||||
static inline void __indirect_readsb(const volatile void __iomem *bus_addr,
|
||||
u8 *vaddr, u32 count)
|
||||
void *p, u32 count)
|
||||
{
|
||||
u8 *vaddr = p;
|
||||
|
||||
while (count--)
|
||||
*vaddr++ = readb(bus_addr);
|
||||
}
|
||||
@ -183,8 +190,10 @@ static inline u16 __indirect_readw(const volatile void __iomem *p)
|
||||
}
|
||||
|
||||
static inline void __indirect_readsw(const volatile void __iomem *bus_addr,
|
||||
u16 *vaddr, u32 count)
|
||||
void *p, u32 count)
|
||||
{
|
||||
u16 *vaddr = p;
|
||||
|
||||
while (count--)
|
||||
*vaddr++ = readw(bus_addr);
|
||||
}
|
||||
@ -204,8 +213,10 @@ static inline u32 __indirect_readl(const volatile void __iomem *p)
|
||||
}
|
||||
|
||||
static inline void __indirect_readsl(const volatile void __iomem *bus_addr,
|
||||
u32 *vaddr, u32 count)
|
||||
void *p, u32 count)
|
||||
{
|
||||
u32 *vaddr = p;
|
||||
|
||||
while (count--)
|
||||
*vaddr++ = readl(bus_addr);
|
||||
}
|
||||
@ -523,8 +534,15 @@ static inline void iowrite32_rep(void __iomem *addr, const void *vaddr,
|
||||
#endif
|
||||
}
|
||||
|
||||
#define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET))
|
||||
#define ioport_unmap(addr)
|
||||
#define ioport_map(port, nr) ioport_map(port, nr)
|
||||
static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
|
||||
{
|
||||
return ((void __iomem*)((port) + PIO_OFFSET));
|
||||
}
|
||||
#define ioport_unmap(addr) ioport_unmap(addr)
|
||||
static inline void ioport_unmap(void __iomem *addr)
|
||||
{
|
||||
}
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
#endif /* __ASM_ARM_ARCH_IO_H */
|
||||
|
||||
@ -238,7 +238,7 @@ void pxa_usb_phy_deinit(void __iomem *phy_reg)
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_USB_SUPPORT)
|
||||
static u64 usb_dma_mask = ~(u32)0;
|
||||
static u64 __maybe_unused usb_dma_mask = ~(u32)0;
|
||||
|
||||
#if IS_ENABLED(CONFIG_USB_MV_UDC)
|
||||
struct resource pxa168_u2o_resources[] = {
|
||||
|
||||
@ -211,7 +211,7 @@ static int mv98dx3236_resume_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
|
||||
return PTR_ERR(base);
|
||||
|
||||
writel(0, base + MV98DX3236_CPU_RESUME_CTRL_REG);
|
||||
writel(virt_to_phys(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG);
|
||||
writel(__pa_symbol(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG);
|
||||
|
||||
iounmap(base);
|
||||
|
||||
|
||||
@ -510,6 +510,7 @@ static void __init ams_delta_init(void)
|
||||
static void modem_pm(struct uart_port *port, unsigned int state, unsigned old)
|
||||
{
|
||||
struct modem_private_data *priv = port->private_data;
|
||||
int ret;
|
||||
|
||||
if (IS_ERR(priv->regulator))
|
||||
return;
|
||||
@ -518,9 +519,16 @@ static void modem_pm(struct uart_port *port, unsigned int state, unsigned old)
|
||||
return;
|
||||
|
||||
if (state == 0)
|
||||
regulator_enable(priv->regulator);
|
||||
ret = regulator_enable(priv->regulator);
|
||||
else if (old == 0)
|
||||
regulator_disable(priv->regulator);
|
||||
ret = regulator_disable(priv->regulator);
|
||||
else
|
||||
ret = 0;
|
||||
|
||||
if (ret)
|
||||
dev_warn(port->dev,
|
||||
"ams_delta modem_pm: failed to %sable regulator: %d\n",
|
||||
state ? "dis" : "en", ret);
|
||||
}
|
||||
|
||||
static struct plat_serial8250_port ams_delta_modem_ports[] = {
|
||||
|
||||
@ -441,13 +441,11 @@ static struct spi_board_info __initdata mistral_boardinfo[] = { {
|
||||
.chip_select = 0,
|
||||
} };
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static irqreturn_t
|
||||
osk_mistral_wake_interrupt(int irq, void *ignored)
|
||||
{
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void __init osk_mistral_init(void)
|
||||
{
|
||||
@ -515,7 +513,6 @@ static void __init osk_mistral_init(void)
|
||||
|
||||
gpio_direction_input(OMAP_MPUIO(2));
|
||||
irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
|
||||
#ifdef CONFIG_PM
|
||||
/* share the IRQ in case someone wants to use the
|
||||
* button for more than wakeup from system sleep.
|
||||
*/
|
||||
@ -529,7 +526,6 @@ static void __init osk_mistral_init(void)
|
||||
ret);
|
||||
} else
|
||||
enable_irq_wake(irq);
|
||||
#endif
|
||||
} else
|
||||
printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n");
|
||||
|
||||
|
||||
@ -28,7 +28,7 @@ static const struct of_device_id omap_dt_match_table[] __initconst = {
|
||||
{ }
|
||||
};
|
||||
|
||||
static void __init omap_generic_init(void)
|
||||
static void __init __maybe_unused omap_generic_init(void)
|
||||
{
|
||||
pdata_quirks_init(omap_dt_match_table);
|
||||
|
||||
|
||||
@ -410,7 +410,7 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
|
||||
return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
|
||||
}
|
||||
|
||||
static void __init omap_hwmod_init_postsetup(void)
|
||||
static void __init __maybe_unused omap_hwmod_init_postsetup(void)
|
||||
{
|
||||
u8 postsetup_state;
|
||||
|
||||
|
||||
@ -486,7 +486,6 @@ int __init omap3_pm_init(void)
|
||||
ret = request_irq(omap_prcm_event_to_irq("io"),
|
||||
_prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io",
|
||||
omap3_pm_init);
|
||||
enable_irq(omap_prcm_event_to_irq("io"));
|
||||
|
||||
if (ret) {
|
||||
pr_err("pm: Failed to request pm_io irq\n");
|
||||
|
||||
@ -692,7 +692,6 @@ static int omap3xxx_prm_late_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
int irq_num;
|
||||
int ret;
|
||||
|
||||
if (!(prm_features & PRM_HAS_IO_WAKEUP))
|
||||
return 0;
|
||||
@ -712,12 +711,8 @@ static int omap3xxx_prm_late_init(void)
|
||||
}
|
||||
|
||||
omap3xxx_prm_enable_io_wakeup();
|
||||
ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
|
||||
if (!ret)
|
||||
irq_set_status_flags(omap_prcm_event_to_irq("io"),
|
||||
IRQ_NOAUTOEN);
|
||||
|
||||
return ret;
|
||||
return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
|
||||
}
|
||||
|
||||
static void __exit omap3xxx_prm_exit(void)
|
||||
|
||||
@ -336,6 +336,27 @@ static void omap44xx_prm_reconfigure_io_chain(void)
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap44xx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches
|
||||
*
|
||||
* Activates the I/O wakeup event latches and allows events logged by
|
||||
* those latches to signal a wakeup event to the PRCM. For I/O wakeups
|
||||
* to occur, WAKEUPENABLE bits must be set in the pad mux registers, and
|
||||
* omap44xx_prm_reconfigure_io_chain() must be called. No return value.
|
||||
*/
|
||||
static void __init omap44xx_prm_enable_io_wakeup(void)
|
||||
{
|
||||
s32 inst = omap4_prmst_get_prm_dev_inst();
|
||||
|
||||
if (inst == PRM_INSTANCE_UNKNOWN)
|
||||
return;
|
||||
|
||||
omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
|
||||
OMAP4430_GLOBAL_WUEN_MASK,
|
||||
inst,
|
||||
omap4_prcm_irq_setup.pm_ctrl);
|
||||
}
|
||||
|
||||
/**
|
||||
* omap44xx_prm_read_reset_sources - return the last SoC reset source
|
||||
*
|
||||
@ -668,6 +689,8 @@ struct pwrdm_ops omap4_pwrdm_operations = {
|
||||
.pwrdm_has_voltdm = omap4_check_vcvp,
|
||||
};
|
||||
|
||||
static int omap44xx_prm_late_init(void);
|
||||
|
||||
/*
|
||||
* XXX document
|
||||
*/
|
||||
@ -675,6 +698,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
|
||||
.read_reset_sources = &omap44xx_prm_read_reset_sources,
|
||||
.was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
|
||||
.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
|
||||
.late_init = &omap44xx_prm_late_init,
|
||||
.assert_hardreset = omap4_prminst_assert_hardreset,
|
||||
.deassert_hardreset = omap4_prminst_deassert_hardreset,
|
||||
.is_hardreset_asserted = omap4_prminst_is_hardreset_asserted,
|
||||
@ -711,6 +735,37 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)
|
||||
return prm_register(&omap44xx_prm_ll_data);
|
||||
}
|
||||
|
||||
static int omap44xx_prm_late_init(void)
|
||||
{
|
||||
int irq_num;
|
||||
|
||||
if (!(prm_features & PRM_HAS_IO_WAKEUP))
|
||||
return 0;
|
||||
|
||||
irq_num = of_irq_get(prm_init_data->np, 0);
|
||||
/*
|
||||
* Already have OMAP4 IRQ num. For all other platforms, we need
|
||||
* IRQ numbers from DT
|
||||
*/
|
||||
if (irq_num < 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) {
|
||||
if (irq_num == -EPROBE_DEFER)
|
||||
return irq_num;
|
||||
|
||||
/* Have nothing to do */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Once OMAP4 DT is filled as well */
|
||||
if (irq_num >= 0) {
|
||||
omap4_prcm_irq_setup.irq = irq_num;
|
||||
omap4_prcm_irq_setup.xlate_irq = NULL;
|
||||
}
|
||||
|
||||
omap44xx_prm_enable_io_wakeup();
|
||||
|
||||
return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
|
||||
}
|
||||
|
||||
static void __exit omap44xx_prm_exit(void)
|
||||
{
|
||||
prm_unregister(&omap44xx_prm_ll_data);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user