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[SCSI] arcmsr: Support 1024 scatter-gather list entries and improve AP while FW trapped and behaviors of EHs

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1. To support 4M/1024 scatter-gather list entry, reorganize struct
   ARCMSR_CDB and struct CommandControlBlock
2. To modify arcmsr_probe
3. In order to help fix F/W issue, add the driver mode for type B card
4. To improve AP's behavior while F/W resets
5. To unify struct MessageUnit_B's members' naming in all OS drivers'
6. To improve error handlers, arcmsr_bus_reset(), arcmsr_abort()
7. To fix the arcmsr_queue_command() in bus reset stage, just let the
   commands pass down to FW, don't block

Signed-off-by: Nick Cheng <nick.cheng@areca.com.tw>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
This commit is contained in:
Nick Cheng 2010-06-18 15:39:12 +08:00 committed by James Bottomley
parent f034260db3
commit ae52e7f09f
2 changed files with 685 additions and 691 deletions
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135
drivers/scsi/arcmsr/arcmsr.h
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@ -48,16 +48,22 @@ struct device_attribute;
/*The limit of outstanding scsi command that firmware can handle*/ /*The limit of outstanding scsi command that firmware can handle*/
#define ARCMSR_MAX_OUTSTANDING_CMD 256 #define ARCMSR_MAX_OUTSTANDING_CMD 256
#define ARCMSR_MAX_FREECCB_NUM 320 #define ARCMSR_MAX_FREECCB_NUM 320
#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2008/11/03" #define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2009/12/09"
#define ARCMSR_SCSI_INITIATOR_ID 255 #define ARCMSR_SCSI_INITIATOR_ID 255
#define ARCMSR_MAX_XFER_SECTORS 512 #define ARCMSR_MAX_XFER_SECTORS 512
#define ARCMSR_MAX_XFER_SECTORS_B 4096 #define ARCMSR_MAX_XFER_SECTORS_B 4096
#define ARCMSR_MAX_XFER_SECTORS_C 304
#define ARCMSR_MAX_TARGETID 17 #define ARCMSR_MAX_TARGETID 17
#define ARCMSR_MAX_TARGETLUN 8 #define ARCMSR_MAX_TARGETLUN 8
#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD #define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD
#define ARCMSR_MAX_QBUFFER 4096 #define ARCMSR_MAX_QBUFFER 4096
#define ARCMSR_MAX_SG_ENTRIES 38 #define ARCMSR_DEFAULT_SG_ENTRIES 38
#define ARCMSR_MAX_HBB_POSTQUEUE 264 #define ARCMSR_MAX_HBB_POSTQUEUE 264
#define ARCMSR_MAX_XFER_LEN 0x26000 /* 152K */
#define ARCMSR_CDB_SG_PAGE_LENGTH 256
#ifndef PCI_DEVICE_ID_ARECA_1880
#define PCI_DEVICE_ID_ARECA_1880 0x1880
#endif
/* /*
********************************************************************************** **********************************************************************************
** **
@ -141,26 +147,19 @@ struct CMD_MESSAGE_FIELD
** structure for holding DMA address data ** structure for holding DMA address data
************************************************************* *************************************************************
*/ */
#define IS_DMA64 (sizeof(dma_addr_t) == 8)
#define IS_SG64_ADDR 0x01000000 /* bit24 */ #define IS_SG64_ADDR 0x01000000 /* bit24 */
struct SG32ENTRY struct SG32ENTRY
{ {
__le32 length; __le32 length;
__le32 address; __le32 address;
}; } __attribute__ ((packed));
struct SG64ENTRY struct SG64ENTRY
{ {
__le32 length; __le32 length;
__le32 address; __le32 address;
__le32 addresshigh; __le32 addresshigh;
}; } __attribute__ ((packed));
struct SGENTRY_UNION
{
union
{
struct SG32ENTRY sg32entry;
struct SG64ENTRY sg64entry;
}u;
};
/* /*
******************************************************************** ********************************************************************
** Q Buffer of IOP Message Transfer ** Q Buffer of IOP Message Transfer
@ -187,6 +186,9 @@ struct FIRMWARE_INFO
char model[8]; /*15, 60-67*/ char model[8]; /*15, 60-67*/
char firmware_ver[16]; /*17, 68-83*/ char firmware_ver[16]; /*17, 68-83*/
char device_map[16]; /*21, 84-99*/ char device_map[16]; /*21, 84-99*/
uint32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/
uint8_t cfgSerial[16]; /*26,104-119*/
uint32_t cfgPicStatus; /*30,120-123*/
}; };
/* signature of set and get firmware config */ /* signature of set and get firmware config */
#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 #define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060
@ -213,6 +215,8 @@ struct FIRMWARE_INFO
#define ARCMSR_CCBREPLY_FLAG_ERROR 0x10000000 #define ARCMSR_CCBREPLY_FLAG_ERROR 0x10000000
/* outbound firmware ok */ /* outbound firmware ok */
#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 #define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000
/* ARC-1680 Bus Reset*/
#define ARCMSR_ARC1680_BUS_RESET 0x00000003
/* /*
************************************************************************ ************************************************************************
@ -264,11 +268,11 @@ struct FIRMWARE_INFO
/* data tunnel buffer between user space program and its firmware */ /* data tunnel buffer between user space program and its firmware */
/* user space data to iop 128bytes */ /* user space data to iop 128bytes */
#define ARCMSR_IOCTL_WBUFFER 0x0000fe00 #define ARCMSR_MESSAGE_WBUFFER 0x0000fe00
/* iop data to user space 128bytes */ /* iop data to user space 128bytes */
#define ARCMSR_IOCTL_RBUFFER 0x0000ff00 #define ARCMSR_MESSAGE_RBUFFER 0x0000ff00
/* iop message_rwbuffer for message command */ /* iop message_rwbuffer for message command */
#define ARCMSR_MSGCODE_RWBUFFER 0x0000fa00 #define ARCMSR_MESSAGE_RWBUFFER 0x0000fa00
/* /*
******************************************************************************* *******************************************************************************
** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504) ** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504)
@ -290,7 +294,7 @@ struct ARCMSR_CDB
#define ARCMSR_CDB_FLAG_HEADQ 0x08 #define ARCMSR_CDB_FLAG_HEADQ 0x08
#define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 #define ARCMSR_CDB_FLAG_ORDEREDQ 0x10
uint8_t Reserved1; uint8_t msgPages;
uint32_t Context; uint32_t Context;
uint32_t DataLength; uint32_t DataLength;
uint8_t Cdb[16]; uint8_t Cdb[16];
@ -303,10 +307,10 @@ struct ARCMSR_CDB
uint8_t SenseData[15]; uint8_t SenseData[15];
union union
{ {
struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; struct SG32ENTRY sg32entry[1];
struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; struct SG64ENTRY sg64entry[1];
} u; } u;
}; } __attribute__ ((packed));
/* /*
******************************************************************************* *******************************************************************************
** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor ** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor
@ -344,13 +348,13 @@ struct MessageUnit_B
uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE];
uint32_t postq_index; uint32_t postq_index;
uint32_t doneq_index; uint32_t doneq_index;
uint32_t __iomem *drv2iop_doorbell_reg; uint32_t __iomem *drv2iop_doorbell;
uint32_t __iomem *drv2iop_doorbell_mask_reg; uint32_t __iomem *drv2iop_doorbell_mask;
uint32_t __iomem *iop2drv_doorbell_reg; uint32_t __iomem *iop2drv_doorbell;
uint32_t __iomem *iop2drv_doorbell_mask_reg; uint32_t __iomem *iop2drv_doorbell_mask;
uint32_t __iomem *msgcode_rwbuffer_reg; uint32_t __iomem *message_rwbuffer;
uint32_t __iomem *ioctl_wbuffer_reg; uint32_t __iomem *message_wbuffer;
uint32_t __iomem *ioctl_rbuffer_reg; uint32_t __iomem *message_rbuffer;
}; };
/* /*
@ -370,14 +374,17 @@ struct AdapterControlBlock
unsigned long vir2phy_offset; unsigned long vir2phy_offset;
/* Offset is used in making arc cdb physical to virtual calculations */ /* Offset is used in making arc cdb physical to virtual calculations */
uint32_t outbound_int_enable; uint32_t outbound_int_enable;
spinlock_t eh_lock;
spinlock_t ccblist_lock;
union { union {
struct MessageUnit_A __iomem * pmuA; struct MessageUnit_A __iomem * pmuA;
struct MessageUnit_B * pmuB; struct MessageUnit_B * pmuB;
}; };
/* message unit ATU inbound base address0 */ /* message unit ATU inbound base address0 */
void __iomem *mem_base0;
void __iomem *mem_base1;
uint32_t acb_flags; uint32_t acb_flags;
u16 dev_id;
uint8_t adapter_index; uint8_t adapter_index;
#define ACB_F_SCSISTOPADAPTER 0x0001 #define ACB_F_SCSISTOPADAPTER 0x0001
#define ACB_F_MSG_STOP_BGRB 0x0002 #define ACB_F_MSG_STOP_BGRB 0x0002
@ -394,6 +401,7 @@ struct AdapterControlBlock
#define ACB_F_BUS_RESET 0x0080 #define ACB_F_BUS_RESET 0x0080
#define ACB_F_IOP_INITED 0x0100 #define ACB_F_IOP_INITED 0x0100
/* iop init */ /* iop init */
#define ACB_F_ABORT 0x0200
#define ACB_F_FIRMWARE_TRAP 0x0400 #define ACB_F_FIRMWARE_TRAP 0x0400
struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM]; struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM];
/* used for memory free */ /* used for memory free */
@ -408,7 +416,8 @@ struct AdapterControlBlock
/* dma_coherent used for memory free */ /* dma_coherent used for memory free */
dma_addr_t dma_coherent_handle; dma_addr_t dma_coherent_handle;
/* dma_coherent_handle used for memory free */ /* dma_coherent_handle used for memory free */
dma_addr_t dma_coherent_handle_hbb_mu;
unsigned int uncache_size;
uint8_t rqbuffer[ARCMSR_MAX_QBUFFER]; uint8_t rqbuffer[ARCMSR_MAX_QBUFFER];
/* data collection buffer for read from 80331 */ /* data collection buffer for read from 80331 */
int32_t rqbuf_firstindex; int32_t rqbuf_firstindex;
@ -432,14 +441,18 @@ struct AdapterControlBlock
uint32_t firm_numbers_queue; uint32_t firm_numbers_queue;
uint32_t firm_sdram_size; uint32_t firm_sdram_size;
uint32_t firm_hd_channels; uint32_t firm_hd_channels;
uint32_t firm_cfg_version;
char firm_model[12]; char firm_model[12];
char firm_version[20]; char firm_version[20];
char device_map[20]; /*21,84-99*/ char device_map[20]; /*21,84-99*/
struct work_struct arcmsr_do_message_isr_bh; struct work_struct arcmsr_do_message_isr_bh;
struct timer_list eternal_timer; struct timer_list eternal_timer;
unsigned short fw_state; unsigned short fw_flag;
#define FW_NORMAL 0x0000
#define FW_BOG 0x0001
#define FW_DEADLOCK 0x0010
atomic_t rq_map_token; atomic_t rq_map_token;
int ante_token_value; atomic_t ante_token_value;
};/* HW_DEVICE_EXTENSION */ };/* HW_DEVICE_EXTENSION */
/* /*
******************************************************************************* *******************************************************************************
@ -449,65 +462,31 @@ struct AdapterControlBlock
*/ */
struct CommandControlBlock struct CommandControlBlock
{ {
struct ARCMSR_CDB arcmsr_cdb; /*x32:sizeof struct_CCB=(32+60)byte, x64:sizeof struct_CCB=(64+60)byte*/
/* struct list_head list; /*x32: 8byte, x64: 16byte*/
** 0-503 (size of CDB = 504): struct scsi_cmnd *pcmd; /*8 bytes pointer of linux scsi command */
** arcmsr messenger scsi command descriptor size 504 bytes struct AdapterControlBlock *acb; /*x32: 4byte, x64: 8byte*/
*/ uint32_t shifted_cdb_phyaddr; /*x32: 4byte, x64: 4byte*/
uint32_t cdb_shifted_phyaddr; uint16_t ccb_flags; /*x32: 2byte, x64: 2byte*/
/* 504-507 */
uint32_t reserved1;
/* 508-511 */
#if BITS_PER_LONG == 64
/* ======================512+64 bytes======================== */
struct list_head list;
/* 512-527 16 bytes next/prev ptrs for ccb lists */
struct scsi_cmnd * pcmd;
/* 528-535 8 bytes pointer of linux scsi command */
struct AdapterControlBlock * acb;
/* 536-543 8 bytes pointer of acb */
uint16_t ccb_flags;
/* 544-545 */
#define CCB_FLAG_READ 0x0000 #define CCB_FLAG_READ 0x0000
#define CCB_FLAG_WRITE 0x0001 #define CCB_FLAG_WRITE 0x0001
#define CCB_FLAG_ERROR 0x0002 #define CCB_FLAG_ERROR 0x0002
#define CCB_FLAG_FLUSHCACHE 0x0004 #define CCB_FLAG_FLUSHCACHE 0x0004
#define CCB_FLAG_MASTER_ABORTED 0x0008 #define CCB_FLAG_MASTER_ABORTED 0x0008
uint16_t startdone; uint16_t startdone; /*x32:2byte,x32:2byte*/
/* 546-547 */
#define ARCMSR_CCB_DONE 0x0000 #define ARCMSR_CCB_DONE 0x0000
#define ARCMSR_CCB_START 0x55AA #define ARCMSR_CCB_START 0x55AA
#define ARCMSR_CCB_ABORTED 0xAA55 #define ARCMSR_CCB_ABORTED 0xAA55
#define ARCMSR_CCB_ILLEGAL 0xFFFF #define ARCMSR_CCB_ILLEGAL 0xFFFF
uint32_t reserved2[7]; #if BITS_PER_LONG == 64
/* 548-551 552-555 556-559 560-563 564-567 568-571 572-575 */ /* ======================512+64 bytes======================== */
uint32_t reserved[6]; /*24 byte*/
#else #else
/* ======================512+32 bytes======================== */ /* ======================512+32 bytes======================== */
struct list_head list; uint32_t reserved[2]; /*8 byte*/
/* 512-519 8 bytes next/prev ptrs for ccb lists */
struct scsi_cmnd * pcmd;
/* 520-523 4 bytes pointer of linux scsi command */
struct AdapterControlBlock * acb;
/* 524-527 4 bytes pointer of acb */
uint16_t ccb_flags;
/* 528-529 */
#define CCB_FLAG_READ 0x0000
#define CCB_FLAG_WRITE 0x0001
#define CCB_FLAG_ERROR 0x0002
#define CCB_FLAG_FLUSHCACHE 0x0004
#define CCB_FLAG_MASTER_ABORTED 0x0008
uint16_t startdone;
/* 530-531 */
#define ARCMSR_CCB_DONE 0x0000
#define ARCMSR_CCB_START 0x55AA
#define ARCMSR_CCB_ABORTED 0xAA55
#define ARCMSR_CCB_ILLEGAL 0xFFFF
uint32_t reserved2[3];
/* 532-535 536-539 540-543 */
#endif #endif
/* ========================================================== */ /* ======================================================= */
struct ARCMSR_CDB arcmsr_cdb;
}; };
/* /*
******************************************************************************* *******************************************************************************

1241
drivers/scsi/arcmsr/arcmsr_hba.c
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