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gma500: Add the base elements of CDV hotplug support

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Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alan Cox 2012-04-25 14:38:32 +01:00 committed by Dave Airlie
parent 68cb638f92
commit ae0a246aef
3 changed files with 48 additions and 3 deletions
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41
drivers/gpu/drm/gma500/cdv_device.c
View File

@ -462,13 +462,48 @@ static void cdv_get_core_freq(struct drm_device *dev)
} }
} }
static void cdv_hotplug_work_func(struct work_struct *work)
{
struct drm_psb_private *dev_priv = container_of(work, struct drm_psb_private,
hotplug_work);
struct drm_device *dev = dev_priv->dev;
/* Just fire off a uevent and let userspace tell us what to do */
drm_helper_hpd_irq_event(dev);
}
/* The core driver has received a hotplug IRQ. We are in IRQ context
so extract the needed information and kick off queued processing */
static int cdv_hotplug_event(struct drm_device *dev)
{
struct drm_psb_private *dev_priv = dev->dev_private;
schedule_work(&dev_priv->hotplug_work);
REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
return 1;
}
static void cdv_hotplug_enable(struct drm_device *dev, bool on)
{
if (on) {
u32 hotplug = REG_READ(PORT_HOTPLUG_EN);
hotplug |= HDMIB_HOTPLUG_INT_EN | HDMIC_HOTPLUG_INT_EN |
HDMID_HOTPLUG_INT_EN | CRT_HOTPLUG_INT_EN;
REG_WRITE(PORT_HOTPLUG_EN, hotplug);
} else {
REG_WRITE(PORT_HOTPLUG_EN, 0);
REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
}
}
static int cdv_chip_setup(struct drm_device *dev) static int cdv_chip_setup(struct drm_device *dev)
{ {
struct drm_psb_private *dev_priv = dev->dev_private;
INIT_WORK(&dev_priv->hotplug_work, cdv_hotplug_work_func);
cdv_get_core_freq(dev); cdv_get_core_freq(dev);
gma_intel_opregion_init(dev); gma_intel_opregion_init(dev);
psb_intel_init_bios(dev); psb_intel_init_bios(dev);
REG_WRITE(PORT_HOTPLUG_EN, 0); cdv_hotplug_enable(dev, false);
REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
return 0; return 0;
} }
@ -489,6 +524,8 @@ const struct psb_ops cdv_chip_ops = {
.crtc_funcs = &cdv_intel_crtc_funcs, .crtc_funcs = &cdv_intel_crtc_funcs,
.output_init = cdv_output_init, .output_init = cdv_output_init,
.hotplug = cdv_hotplug_event,
.hotplug_enable = cdv_hotplug_enable,
#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
.backlight_init = cdv_backlight_init, .backlight_init = cdv_backlight_init,

5
drivers/gpu/drm/gma500/psb_drv.h
View File

@ -626,6 +626,11 @@ struct drm_psb_private {
uint32_t msi_addr; uint32_t msi_addr;
uint32_t msi_data; uint32_t msi_data;
/*
* Hotplug handling
*/
struct work_struct hotplug_work;
/* /*
* LID-Switch * LID-Switch

5
drivers/gpu/drm/gma500/psb_intel_reg.h
View File

@ -219,7 +219,7 @@
#define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */ #define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */
#define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */
#define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */ #define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */
#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ #define DPLL_FPA0h1_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
#define DPLL_LOCK (1 << 15) /* CDV */ #define DPLL_LOCK (1 << 15) /* CDV */
/* /*
@ -346,6 +346,9 @@
#define FP_M2_DIV_SHIFT 0 #define FP_M2_DIV_SHIFT 0
#define PORT_HOTPLUG_EN 0x61110 #define PORT_HOTPLUG_EN 0x61110
#define HDMIB_HOTPLUG_INT_EN (1 << 29)
#define HDMIC_HOTPLUG_INT_EN (1 << 28)
#define HDMID_HOTPLUG_INT_EN (1 << 27)
#define SDVOB_HOTPLUG_INT_EN (1 << 26) #define SDVOB_HOTPLUG_INT_EN (1 << 26)
#define SDVOC_HOTPLUG_INT_EN (1 << 25) #define SDVOC_HOTPLUG_INT_EN (1 << 25)
#define TV_HOTPLUG_INT_EN (1 << 18) #define TV_HOTPLUG_INT_EN (1 << 18)