ARM: dts: Kill off skeleton{64}.dtsi

Remove the usage of skeleton.dtsi in the remaining dts files. It was
deprecated since commit 9c0da3cc61 ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated"). This will make adding a unit-address to
memory nodes easier.

The main tricky part to removing skeleton.dtsi is we could end up with
no /memory node at all when a bootloader depends on one being present. I
hacked up dtc to check for this condition.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Rob Herring 2019-01-09 10:26:14 -06:00 committed by Arnd Bergmann
parent 6569df3d62
commit abe60a3a7a
141 changed files with 309 additions and 141 deletions

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@ -4,10 +4,11 @@
* Licensed under the X11 license or the GPL v2 (or later) * Licensed under the X11 license or the GPL v2 (or later)
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/clock/alphascale,asm9260.h> #include <dt-bindings/clock/alphascale,asm9260.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&icoll>; interrupt-parent = <&icoll>;
memory { memory {

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@ -25,12 +25,18 @@
*/ */
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton64.dtsi"
/ { / {
#address-cells = <2>;
#size-cells = <2>;
/* SOC compatibility */ /* SOC compatibility */
compatible = "al,alpine"; compatible = "al,alpine";
memory {
device_type = "memory";
reg = <0 0 0 0>;
};
/* CPU Configuration */ /* CPU Configuration */
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;

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@ -22,9 +22,10 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,realview-eb"; compatible = "arm,realview-eb";
chosen { }; chosen { };
@ -38,6 +39,7 @@
}; };
memory { memory {
device_type = "memory";
/* 128 MiB memory @ 0x0 */ /* 128 MiB memory @ 0x0 */
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -23,9 +23,10 @@
/dts-v1/; /dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "ARM RealView PB1176"; model = "ARM RealView PB1176";
compatible = "arm,realview-pb1176"; compatible = "arm,realview-pb1176";
@ -40,6 +41,7 @@
}; };
memory { memory {
device_type = "memory";
/* 128 MiB memory @ 0x0 */ /* 128 MiB memory @ 0x0 */
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -23,9 +23,10 @@
/dts-v1/; /dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "ARM RealView PB11MPcore"; model = "ARM RealView PB11MPcore";
compatible = "arm,realview-pb11mp"; compatible = "arm,realview-pb11mp";
@ -39,6 +40,7 @@
}; };
memory { memory {
device_type = "memory";
/* /*
* The PB11MPCore has 512 MiB memory @ 0x70000000 * The PB11MPCore has 512 MiB memory @ 0x70000000
* and the first 256 are also remapped @ 0x00000000 * and the first 256 are also remapped @ 0x00000000

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@ -22,9 +22,10 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,realview-pbx"; compatible = "arm,realview-pbx";
chosen { }; chosen { };
@ -39,6 +40,7 @@
}; };
memory { memory {
device_type = "memory";
/* 128 MiB memory @ 0x0 */ /* 128 MiB memory @ 0x0 */
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -9,13 +9,15 @@
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Armada 38x family SoC"; model = "Marvell Armada 38x family SoC";
compatible = "marvell,armada380"; compatible = "marvell,armada380";

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@ -7,13 +7,14 @@
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Armada 39x family SoC"; model = "Marvell Armada 39x family SoC";
compatible = "marvell,armada390"; compatible = "marvell,armada390";

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@ -43,9 +43,10 @@
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/dma/nbpfaxi.h> #include <dt-bindings/dma/nbpfaxi.h>
#include <dt-bindings/clock/axis,artpec6-clkctrl.h> #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "axis,artpec6"; compatible = "axis,artpec6";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;

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@ -10,13 +10,14 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91RM9200 family SoC"; model = "Atmel AT91RM9200 family SoC";
compatible = "atmel,at91rm9200"; compatible = "atmel,at91rm9200";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -49,6 +50,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x20000000 0x04000000>; reg = <0x20000000 0x04000000>;
}; };

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@ -8,13 +8,14 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9260 family SoC"; model = "Atmel AT91SAM9260 family SoC";
compatible = "atmel,at91sam9260"; compatible = "atmel,at91sam9260";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -46,6 +47,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x20000000 0x04000000>; reg = <0x20000000 0x04000000>;
}; };

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@ -6,13 +6,14 @@
* Licensed under GPLv2 only. * Licensed under GPLv2 only.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9261 family SoC"; model = "Atmel AT91SAM9261 family SoC";
compatible = "atmel,at91sam9261"; compatible = "atmel,at91sam9261";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -43,6 +44,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x20000000 0x08000000>; reg = <0x20000000 0x08000000>;
}; };

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@ -6,13 +6,14 @@
* Licensed under GPLv2 only. * Licensed under GPLv2 only.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9263 family SoC"; model = "Atmel AT91SAM9263 family SoC";
compatible = "atmel,at91sam9263"; compatible = "atmel,at91sam9263";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -45,6 +46,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x20000000 0x08000000>; reg = <0x20000000 0x08000000>;
}; };

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@ -9,7 +9,6 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h> #include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
@ -17,6 +16,8 @@
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9G45 family SoC"; model = "Atmel AT91SAM9G45 family SoC";
compatible = "atmel,at91sam9g45"; compatible = "atmel,at91sam9g45";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -51,6 +52,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x70000000 0x10000000>; reg = <0x70000000 0x10000000>;
}; };

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@ -7,7 +7,6 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h> #include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
@ -15,6 +14,8 @@
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9N12 SoC"; model = "Atmel AT91SAM9N12 SoC";
compatible = "atmel,at91sam9n12"; compatible = "atmel,at91sam9n12";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -47,6 +48,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x20000000 0x10000000>; reg = <0x20000000 0x10000000>;
}; };

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@ -7,7 +7,6 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
@ -15,6 +14,8 @@
#include <dt-bindings/pwm/pwm.h> #include <dt-bindings/pwm/pwm.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9RL family SoC"; model = "Atmel AT91SAM9RL family SoC";
compatible = "atmel,at91sam9rl", "atmel,at91sam9"; compatible = "atmel,at91sam9rl", "atmel,at91sam9";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -48,6 +49,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x20000000 0x04000000>; reg = <0x20000000 0x04000000>;
}; };

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@ -9,7 +9,6 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h> #include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
@ -17,6 +16,8 @@
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9x5 family SoC"; model = "Atmel AT91SAM9x5 family SoC";
compatible = "atmel,at91sam9x5"; compatible = "atmel,at91sam9x5";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -49,6 +50,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x20000000 0x10000000>; reg = <0x20000000 0x10000000>;
}; };

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@ -15,6 +15,7 @@
compatible = "sirf,atlas6-cb", "sirf,atlas6"; compatible = "sirf,atlas6-cb", "sirf,atlas6";
memory { memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; reg = <0x00000000 0x20000000>;
}; };

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@ -6,7 +6,6 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
/include/ "skeleton.dtsi"
/ { / {
compatible = "sirf,atlas6"; compatible = "sirf,atlas6";
#address-cells = <1>; #address-cells = <1>;

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@ -6,7 +6,6 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
/include/ "skeleton.dtsi"
/ { / {
compatible = "sirf,atlas7"; compatible = "sirf,atlas7";
#address-cells = <1>; #address-cells = <1>;

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@ -12,9 +12,9 @@
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/lsi,axm5516-clks.h> #include <dt-bindings/clock/lsi,axm5516-clks.h>
#include "skeleton64.dtsi"
/ { / {
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
aliases { aliases {

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@ -34,9 +34,9 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/bcm-cygnus.h> #include <dt-bindings/clock/bcm-cygnus.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,cygnus"; compatible = "brcm,cygnus";
model = "Broadcom Cygnus SoC"; model = "Broadcom Cygnus SoC";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
@ -45,6 +45,11 @@
ethernet0 = &eth0; ethernet0 = &eth0;
}; };
memory {
device_type = "memory";
reg = <0 0>;
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

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@ -34,9 +34,9 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/bcm-nsp.h> #include <dt-bindings/clock/bcm-nsp.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,nsp"; compatible = "brcm,nsp";
model = "Broadcom Northstar Plus SoC"; model = "Broadcom Northstar Plus SoC";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;

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@ -16,9 +16,9 @@
#include "dt-bindings/clock/bcm281xx.h" #include "dt-bindings/clock/bcm281xx.h"
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "BCM11351 SoC"; model = "BCM11351 SoC";
compatible = "brcm,bcm11351"; compatible = "brcm,bcm11351";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;

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@ -22,6 +22,7 @@
compatible = "brcm,bcm21664-garnet", "brcm,bcm21664"; compatible = "brcm,bcm21664-garnet", "brcm,bcm21664";
memory { memory {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */ reg = <0x80000000 0x40000000>; /* 1 GB */
}; };

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@ -16,9 +16,9 @@
#include "dt-bindings/clock/bcm21664.h" #include "dt-bindings/clock/bcm21664.h"
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "BCM21664 SoC"; model = "BCM21664 SoC";
compatible = "brcm,bcm21664"; compatible = "brcm,bcm21664";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;

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@ -46,6 +46,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */ reg = <0x80000000 0x20000000>; /* 512 MB */
}; };
}; };

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@ -36,9 +36,9 @@
/* BCM23550 and BCM21664 have almost identical clocks */ /* BCM23550 and BCM21664 have almost identical clocks */
#include "dt-bindings/clock/bcm21664.h" #include "dt-bindings/clock/bcm21664.h"
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "BCM23550 SoC"; model = "BCM23550 SoC";
compatible = "brcm,bcm23550"; compatible = "brcm,bcm23550";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;

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@ -22,6 +22,7 @@
compatible = "brcm,bcm28155-ap", "brcm,bcm11351"; compatible = "brcm,bcm28155-ap", "brcm,bcm11351";
memory { memory {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */ reg = <0x80000000 0x40000000>; /* 1 GB */
}; };

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@ -20,6 +20,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x08000000>; 0x88000000 0x08000000>;
}; };

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@ -20,6 +20,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x08000000>; 0x88000000 0x08000000>;
}; };

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@ -20,6 +20,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x08000000>; 0x88000000 0x08000000>;
}; };

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@ -16,6 +16,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -16,6 +16,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -20,6 +20,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x08000000>; 0x88000000 0x08000000>;
}; };

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@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x08000000>; 0x88000000 0x08000000>;
}; };

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@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x18000000>; 0x88000000 0x18000000>;
}; };

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@ -16,6 +16,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x18000000>; 0x88000000 0x18000000>;
}; };

View File

@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x08000000>; 0x88000000 0x08000000>;
}; };

View File

@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x18000000>; 0x88000000 0x18000000>;
}; };

View File

@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000 reg = <0x00000000 0x08000000
0x88000000 0x18000000>; 0x88000000 0x18000000>;
}; };

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@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -17,6 +17,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

View File

@ -16,6 +16,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -13,9 +13,10 @@
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
chipcommonA { chipcommonA {

View File

@ -20,6 +20,7 @@
}; };
memory@0 { memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>, reg = <0x00000000 0x08000000>,
<0x68000000 0x08000000>; <0x68000000 0x08000000>;
}; };

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@ -7,9 +7,10 @@
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
aliases { aliases {

View File

@ -6,9 +6,9 @@
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,bcm63138"; compatible = "brcm,bcm63138";
model = "Broadcom BCM63138 DSL SoC"; model = "Broadcom BCM63138 DSL SoC";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;

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@ -1,8 +1,6 @@
// SPDX-License-Identifier: GPL-2.0 // SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;

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@ -18,6 +18,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

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@ -40,6 +40,7 @@
compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708"; compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708";
memory { memory {
device_type = "memory";
reg = <0x00000000 0x8000000>; reg = <0x00000000 0x8000000>;
}; };

View File

@ -46,6 +46,7 @@
}; };
memory@80000000 { memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; reg = <0x80000000 0x10000000>;
}; };
}; };

View File

@ -44,6 +44,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; reg = <0x80000000 0x10000000>;
}; };
}; };

View File

@ -44,9 +44,9 @@
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cnxt,cx92755"; compatible = "cnxt,cx92755";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;

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@ -1,12 +1,12 @@
// SPDX-License-Identifier: GPL-2.0 // SPDX-License-Identifier: GPL-2.0
/include/ "skeleton.dtsi"
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "marvell,dove"; compatible = "marvell,dove";
model = "Marvell Armada 88AP510 SoC"; model = "Marvell Armada 88AP510 SoC";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;

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@ -6,11 +6,11 @@
/dts-v1/; /dts-v1/;
#include "skeleton.dtsi"
#include <dt-bindings/clock/clps711x-clock.h> #include <dt-bindings/clock/clps711x-clock.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Cirrus Logic EP7209"; model = "Cirrus Logic EP7209";
compatible = "cirrus,ep7209"; compatible = "cirrus,ep7209";

View File

@ -12,6 +12,7 @@
compatible = "cirrus,edb7211", "cirrus,ep7211", "cirrus,ep7209"; compatible = "cirrus,edb7211", "cirrus,ep7211", "cirrus,ep7209";
memory { memory {
device_type = "memory";
reg = <0xc0000000 0x02000000>; reg = <0xc0000000 0x02000000>;
}; };

View File

@ -3,9 +3,15 @@
* SoC core Device Tree for the ARM Integrator platforms * SoC core Device Tree for the ARM Integrator platforms
*/ */
/include/ "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
memory {
device_type = "memory";
reg = <0x0 0x0>;
};
core-module@10000000 { core-module@10000000 {
compatible = "arm,core-module-integrator", "syscon", "simple-mfd"; compatible = "arm,core-module-integrator", "syscon", "simple-mfd";
reg = <0x10000000 0x200>; reg = <0x10000000 0x200>;

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@ -1,11 +1,12 @@
// SPDX-License-Identifier: GPL-2.0 // SPDX-License-Identifier: GPL-2.0
/include/ "skeleton.dtsi"
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "marvell,kirkwood"; compatible = "marvell,kirkwood";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;

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@ -11,12 +11,12 @@
* http://www.gnu.org/copyleft/gpl.html * http://www.gnu.org/copyleft/gpl.html
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/clock/lpc32xx-clock.h> #include <dt-bindings/clock/lpc32xx-clock.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "nxp,lpc3220"; compatible = "nxp,lpc3220";
interrupt-parent = <&mic>; interrupt-parent = <&mic>;

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@ -45,11 +45,12 @@
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include "skeleton64.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
/ { / {
#address-cells = <2>;
#size-cells = <2>;
compatible = "fsl,ls1021a"; compatible = "fsl,ls1021a";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
@ -88,6 +89,11 @@
}; };
}; };
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x0>;
};
sysclk: sysclk { sysclk: sysclk {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;

View File

@ -47,9 +47,10 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
/include/ "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
L2: l2-cache-controller@c4200000 { L2: l2-cache-controller@c4200000 {

View File

@ -61,6 +61,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x40000000 0x80000000>; reg = <0x40000000 0x80000000>;
}; };
}; };

View File

@ -57,6 +57,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x40000000 0x80000000>; reg = <0x40000000 0x80000000>;
}; };

View File

@ -23,6 +23,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x40000000 0x40000000>; reg = <0x40000000 0x40000000>;
}; };

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@ -60,6 +60,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x40000000 0x40000000>; reg = <0x40000000 0x40000000>;
}; };
}; };

View File

@ -62,6 +62,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x40000000 0x40000000>; reg = <0x40000000 0x40000000>;
}; };

View File

@ -28,6 +28,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x40000000 0x80000000>; reg = <0x40000000 0x80000000>;
}; };

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@ -19,6 +19,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; reg = <0x00000000 0x08000000>;
}; };

View File

@ -7,10 +7,12 @@
* publishhed by the Free Software Foundation. * publishhed by the Free Software Foundation.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/clock/marvell,mmp2.h> #include <dt-bindings/clock/marvell,mmp2.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
aliases { aliases {
serial0 = &uart1; serial0 = &uart1;
serial1 = &uart2; serial1 = &uart2;

View File

@ -5,10 +5,11 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "moxa,moxart"; compatible = "moxa,moxart";
model = "MOXART"; model = "MOXART";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;

View File

@ -13,6 +13,7 @@
compatible = "mediatek,mt2701-evb", "mediatek,mt2701"; compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
memory { memory {
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>; reg = <0 0x80000000 0 0x40000000>;
}; };

View File

@ -12,10 +12,11 @@
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/memory/mt2701-larb-port.h> #include <dt-bindings/memory/mt2701-larb-port.h>
#include <dt-bindings/reset/mt2701-resets.h> #include <dt-bindings/reset/mt2701-resets.h>
#include "skeleton64.dtsi"
#include "mt2701-pinfunc.h" #include "mt2701-pinfunc.h"
/ { / {
#address-cells = <2>;
#size-cells = <2>;
compatible = "mediatek,mt2701"; compatible = "mediatek,mt2701";
interrupt-parent = <&cirq>; interrupt-parent = <&cirq>;

View File

@ -22,6 +22,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; reg = <0x80000000 0x20000000>;
}; };
}; };

View File

@ -7,7 +7,6 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ { / {
compatible = "mediatek,mt6580"; compatible = "mediatek,mt6580";

View File

@ -18,6 +18,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x80000000 0x40000000>; reg = <0x80000000 0x40000000>;
}; };

View File

@ -7,9 +7,10 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mediatek,mt6589"; compatible = "mediatek,mt6589";
interrupt-parent = <&sysirq>; interrupt-parent = <&sysirq>;

View File

@ -13,7 +13,7 @@
compatible = "mediatek,mt6592-evb", "mediatek,mt6592"; compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
memory { memory {
device_type = "memory";
reg = <0x80000000 0x40000000>; reg = <0x80000000 0x40000000>;
}; };
}; };

View File

@ -7,9 +7,10 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mediatek,mt6592"; compatible = "mediatek,mt6592";
interrupt-parent = <&sysirq>; interrupt-parent = <&sysirq>;

View File

@ -13,6 +13,7 @@
compatible = "mediatek,mt8127-moose", "mediatek,mt8127"; compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
memory { memory {
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>; reg = <0 0x80000000 0 0x40000000>;
}; };
}; };

View File

@ -7,9 +7,10 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton64.dtsi"
/ { / {
#address-cells = <2>;
#size-cells = <2>;
compatible = "mediatek,mt8127"; compatible = "mediatek,mt8127";
interrupt-parent = <&sysirq>; interrupt-parent = <&sysirq>;

View File

@ -13,6 +13,7 @@
compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135"; compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
memory { memory {
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>; reg = <0 0x80000000 0 0x40000000>;
}; };
}; };

View File

@ -9,10 +9,11 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/mt8135-resets.h> #include <dt-bindings/reset/mt8135-resets.h>
#include "skeleton64.dtsi"
#include "mt8135-pinfunc.h" #include "mt8135-pinfunc.h"
/ { / {
#address-cells = <2>;
#size-cells = <2>;
compatible = "mediatek,mt8135"; compatible = "mediatek,mt8135";
interrupt-parent = <&sysirq>; interrupt-parent = <&sysirq>;

View File

@ -9,9 +9,9 @@
* *
*/ */
/include/ "skeleton.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
cpus { cpus {

View File

@ -19,6 +19,7 @@
compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x"; compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x";
memory { memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */ reg = <0x00000000 0x4000000>; /* 64 MB */
}; };

View File

@ -25,6 +25,7 @@
compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x"; compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
memory { memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */ reg = <0x00000000 0x4000000>; /* 64 MB */
}; };

View File

@ -55,6 +55,7 @@
compatible = "buffalo,lswsgl", "marvell,orion5x-88f5182", "marvell,orion5x"; compatible = "buffalo,lswsgl", "marvell,orion5x-88f5182", "marvell,orion5x";
memory { memory {
device_type = "memory";
reg = <0x00000000 0x8000000>; /* 128 MB */ reg = <0x00000000 0x8000000>; /* 128 MB */
}; };

View File

@ -19,6 +19,7 @@
compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x"; compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";
memory { memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */ reg = <0x00000000 0x4000000>; /* 64 MB */
}; };

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@ -21,6 +21,7 @@
}; };
memory { memory {
device_type = "memory";
reg = <0x00000000 0x2000000>; /* 32 MB */ reg = <0x00000000 0x2000000>; /* 32 MB */
}; };

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@ -16,6 +16,7 @@
compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x"; compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x";
memory { memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */ reg = <0x00000000 0x4000000>; /* 64 MB */
}; };

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@ -6,11 +6,11 @@
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
#include "skeleton.dtsi"
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ { / {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Orion5x SoC"; model = "Marvell Orion5x SoC";
compatible = "marvell,orion5x"; compatible = "marvell,orion5x";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;

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@ -6,11 +6,12 @@
* Licensed under GPLv2 or later * Licensed under GPLv2 or later
*/ */
/include/ "skeleton.dtsi"
#include <dt-bindings/clock/oxsemi,ox810se.h> #include <dt-bindings/clock/oxsemi,ox810se.h>
#include <dt-bindings/reset/oxsemi,ox810se.h> #include <dt-bindings/reset/oxsemi,ox810se.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "oxsemi,ox810se"; compatible = "oxsemi,ox810se";
cpus { cpus {
@ -25,6 +26,7 @@
}; };
memory { memory {
device_type = "memory";
/* Max 256MB @ 0x48000000 */ /* Max 256MB @ 0x48000000 */
reg = <0x48000000 0x10000000>; reg = <0x48000000 0x10000000>;
}; };

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@ -6,12 +6,13 @@
* Licensed under GPLv2 or later * Licensed under GPLv2 or later
*/ */
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/oxsemi,ox820.h> #include <dt-bindings/clock/oxsemi,ox820.h>
#include <dt-bindings/reset/oxsemi,ox820.h> #include <dt-bindings/reset/oxsemi,ox820.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "oxsemi,ox820"; compatible = "oxsemi,ox820";
cpus { cpus {
@ -35,6 +36,7 @@
}; };
memory { memory {
device_type = "memory";
/* Max 512MB @ 0x60000000 */ /* Max 512MB @ 0x60000000 */
reg = <0x60000000 0x20000000>; reg = <0x60000000 0x20000000>;
}; };

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@ -10,7 +10,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
/include/ "skeleton.dtsi"
/ { / {
model = "Picochip picoXcell PC3X2"; model = "Picochip picoXcell PC3X2";
compatible = "picochip,pc3x2"; compatible = "picochip,pc3x2";

View File

@ -10,7 +10,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
/include/ "skeleton.dtsi"
/ { / {
model = "Picochip picoXcell PC3X3"; model = "Picochip picoXcell PC3X3";
compatible = "picochip,pc3x3"; compatible = "picochip,pc3x3";

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@ -15,6 +15,7 @@
compatible = "sirf,prima2", "sirf,prima2-cb"; compatible = "sirf,prima2", "sirf,prima2-cb";
memory { memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; reg = <0x00000000 0x20000000>;
}; };

View File

@ -6,7 +6,6 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
/include/ "skeleton.dtsi"
/ { / {
compatible = "sirf,prima2"; compatible = "sirf,prima2";
#address-cells = <1>; #address-cells = <1>;

View File

@ -7,10 +7,12 @@
* publishhed by the Free Software Foundation. * publishhed by the Free Software Foundation.
*/ */
#include "skeleton.dtsi"
#include <dt-bindings/clock/marvell,pxa168.h> #include <dt-bindings/clock/marvell,pxa168.h>
/ { / {
#address-cells = <1>;
#size-cells = <1>;
aliases { aliases {
serial0 = &uart1; serial0 = &uart1;
serial1 = &uart2; serial1 = &uart2;

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