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drm/amdgpu: add irq sources for vcn v2_0 (v2)

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Add the interrupt source packet definitions.

v2: update (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang 2018-12-06 05:25:51 +08:00 committed by Alex Deucher
parent 4984dd069f
commit abade675e0
1 changed files with 32 additions and 0 deletions
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32
drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_2_0.h Normal file
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/*
* Copyright 2018 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __IRQSRCS_VCN_2_0_H__
#define __IRQSRCS_VCN_2_0_H__
#define VCN_2_0__SRCID__UVD_ENC_GENERAL_PURPOSE 119 // 0x77 Encoder General Purpose
#define VCN_2_0__SRCID__UVD_ENC_LOW_LATENCY 120 // 0x78 Encoder Low Latency
#define VCN_2_0__SRCID__UVD_SYSTEM_MESSAGE_INTERRUPT 124 // 0x7c UVD system message interrupt
#define VCN_2_0__SRCID__JPEG_ENCODE 151 // 0x97 JRBC Encode interrupt
#define VCN_2_0__SRCID__JPEG_DECODE 153 // 0x99 JRBC Decode interrupt
#endif