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arm64: dts: exynosautov9: prepare usi0 changes

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Before adding whole USI nodes, this applies the changes of usi0 in
advance. To be the usi0 and serian_0 nodes as SoC default, some
properties should be moved to exynosautov9-sadk.dts.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-5-chanho61.park@samsung.com
This commit is contained in:
Chanho Park
2022-07-01 10:52:25 +09:00
committed by Krzysztof Kozlowski
parent 358ab0d11d
commit aae10d2bc5
2 changed files with 7 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
View File

@@ -50,6 +50,7 @@
};
&serial_0 {
pinctrl-0 = <&uart0_bus_dual>;
status = "okay";
};
@@ -74,6 +75,7 @@
};
&usi_0 {
samsung,clkreq-on; /* needed for UART mode */
status = "okay";
};

10
arch/arm64/boot/dts/exynos/exynosautov9.dtsi
View File

@@ -352,11 +352,11 @@
};
usi_0: usi@103000c0 {
compatible = "samsung,exynos850-usi";
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103000c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1000>;
samsung,mode = <USI_V2_UART>;
samsung,clkreq-on; /* needed for UART mode */
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -365,13 +365,13 @@
clock-names = "pclk", "ipclk";
status = "disabled";
/* USI: UART */
serial_0: serial@10300000 {
compatible = "samsung,exynos850-uart";
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10300000 0xc0>;
interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart0_bus_dual>;
pinctrl-0 = <&uart0_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";