TI K3 device tree updates for v6.1

New Features:
AM62A:
* Basic support for AM62A SoC and SK Board
AM62:
* EPWM support
AM64:
* GPMC, LED, Crypto accelerator support

Fixes:
J7200 pinmux node update
Fixes for Crypto and RNG accelerators on AM65, J721e, J7200

Cleanups:
Reorder SoC compatible and pinmux macros alphabetically

* tag 'ti-k3-dt-for-v6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (22 commits)
  arm64: dts: ti: k3-j7200: fix main pinmux range
  arm64: dts: ti: Add support for AM62A7-SK
  arm64: dts: ti: Introduce AM62A7 family of SoCs
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62A
  dt-bindings: arm: ti: Add bindings for AM62A7 SoC
  dt-bindings: arm: ti: Rearrange IOPAD macros alphabetically
  arm64: dts: ti: k3-am625-sk: Add epwm nodes
  arm64: dts: ti: k3-am62-main: Add epwm nodes
  arm64: dts: ti: k3-am642-sk: Add DT entry for onboard LEDs
  arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node
  arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2UL
  arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread ID
  arm64: dts: ti: k3-am65-main: Disable RNG node
  arm64: dts: ti: k3-j7200-main: Add main domain watchdog entries
  arm64: dts: ti: k3-am64-main: Add ELM (Error Location Module) node
  arm64: dts: ti: k3-am64-main: Add GPMC memory controller node
  arm64: dts: ti: k3-j721e-main: fix RNG node clock id
  arm64: dts: ti: k3-am64-main: Enable crypto accelerator
  arm64: dts: ti: k3-am64: Add SA2UL address space to Main CBASS ranges
  arm64: dts: ti: k3-am64-main: Add main_cpts label
  ...

Link: https://lore.kernel.org/r/44729b46-27f9-94a0-17ed-8868649a4a0a@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2022-09-23 16:31:28 +02:00
20 changed files with 1129 additions and 42 deletions

View File

@@ -29,19 +29,22 @@
#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN)
#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#endif