drm/amd/powerplay: update the metrics table cache interval as 1ms

To make the setting same as Arcturus/Navi1x/Sienna_Cichlid.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
2020-08-06 15:38:25 +08:00
committed by Alex Deucher
parent 9fb1506eb6
commit a9c75edcbe
3 changed files with 3 additions and 3 deletions

View File

@@ -1272,7 +1272,7 @@ static int vega12_get_metrics_table(struct pp_hwmgr *hwmgr,
if (bypass_cache || if (bypass_cache ||
!data->metrics_time || !data->metrics_time ||
time_after(jiffies, data->metrics_time + HZ / 2)) { time_after(jiffies, data->metrics_time + msecs_to_jiffies(1))) {
ret = smum_smc_table_manager(hwmgr, ret = smum_smc_table_manager(hwmgr,
(uint8_t *)(&data->metrics_table), (uint8_t *)(&data->metrics_table),
TABLE_SMU_METRICS, TABLE_SMU_METRICS,

View File

@@ -2082,7 +2082,7 @@ static int vega20_get_metrics_table(struct pp_hwmgr *hwmgr,
if (bypass_cache || if (bypass_cache ||
!data->metrics_time || !data->metrics_time ||
time_after(jiffies, data->metrics_time + HZ / 2)) { time_after(jiffies, data->metrics_time + msecs_to_jiffies(1))) {
ret = smum_smc_table_manager(hwmgr, ret = smum_smc_table_manager(hwmgr,
(uint8_t *)(&data->metrics_table), (uint8_t *)(&data->metrics_table),
TABLE_SMU_METRICS, TABLE_SMU_METRICS,

View File

@@ -139,7 +139,7 @@ static int renoir_get_metrics_table(struct smu_context *smu,
if (bypass_cache || if (bypass_cache ||
!smu_table->metrics_time || !smu_table->metrics_time ||
time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(100))) { time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(1))) {
ret = smu_cmn_update_table(smu, SMU_TABLE_SMU_METRICS, 0, ret = smu_cmn_update_table(smu, SMU_TABLE_SMU_METRICS, 0,
(void *)smu_table->metrics_table, false); (void *)smu_table->metrics_table, false);
if (ret) { if (ret) {