From a88a2b886404b1cfc109125b1cba4775e8682955 Mon Sep 17 00:00:00 2001 From: Paulius Zaleckas Date: Fri, 23 Apr 2010 13:17:47 -0400 Subject: [PATCH] mtd: fix Orion NAND driver compilation with ARM OABI We must tell GCC to use even register for variable passed to ldrd instruction. Without this patch GCC 4.2.1 puts this variable to r2/r3 on EABI and r3/r4 on OABI, so force it to r2/r3. This does not change anything when EABI and OABI compilation works OK. Without this patch and with OABI I get: CC drivers/mtd/nand/orion_nand.o /tmp/ccMkwOCs.s: Assembler messages: /tmp/ccMkwOCs.s:63: Error: first destination register must be even -- `ldrd r3,[ip]' make[5]: *** [drivers/mtd/nand/orion_nand.o] Error 1 Signed-off-by: Paulius Zaleckas Acked-by: Nicolas Pitre Acked-by: Artem Bityutskiy Cc: David Woodhouse Cc: Jamie Lokier Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/mtd/nand/orion_nand.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c index f59c07427af3..d60fc5719fef 100644 --- a/drivers/mtd/nand/orion_nand.c +++ b/drivers/mtd/nand/orion_nand.c @@ -60,7 +60,13 @@ static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) } buf64 = (uint64_t *)buf; while (i < len/8) { - uint64_t x; + /* + * Since GCC has no proper constraint (PR 43518) + * force x variable to r2/r3 registers as ldrd instruction + * requires first register to be even. + */ + register uint64_t x asm ("r2"); + asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); buf64[i++] = x; }