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drm/msm/mdp5: add tracking for clk enable-count

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Accessing registers for an unclocked block is an insta-reboot on
snapdragon devices.  So add a bit of logic to track the enable_count so
we can WARN_ON() unclocked register writes.  This makes it much easier
to track down mistakes.

Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark 2017-07-03 13:13:57 -04:00
parent a0ce4d23b1
commit a7d3bb0045
2 changed files with 9 additions and 0 deletions
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5
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
View File

@ -249,6 +249,9 @@ int mdp5_disable(struct mdp5_kms *mdp5_kms)
{
DBG("");
mdp5_kms->enable_count--;
WARN_ON(mdp5_kms->enable_count < 0);
clk_disable_unprepare(mdp5_kms->ahb_clk);
clk_disable_unprepare(mdp5_kms->axi_clk);
clk_disable_unprepare(mdp5_kms->core_clk);
@ -262,6 +265,8 @@ int mdp5_enable(struct mdp5_kms *mdp5_kms)
{
DBG("");
mdp5_kms->enable_count++;
clk_prepare_enable(mdp5_kms->ahb_clk);
clk_prepare_enable(mdp5_kms->axi_clk);
clk_prepare_enable(mdp5_kms->core_clk);

4
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
View File

@ -76,6 +76,8 @@ struct mdp5_kms {
bool rpm_enabled;
struct mdp_irq error_handler;
int enable_count;
};
#define to_mdp5_kms(x) container_of(x, struct mdp5_kms, base)
@ -167,11 +169,13 @@ struct mdp5_encoder {
static inline void mdp5_write(struct mdp5_kms *mdp5_kms, u32 reg, u32 data)
{
WARN_ON(mdp5_kms->enable_count <= 0);
msm_writel(data, mdp5_kms->mmio + reg);
}
static inline u32 mdp5_read(struct mdp5_kms *mdp5_kms, u32 reg)
{
WARN_ON(mdp5_kms->enable_count <= 0);
return msm_readl(mdp5_kms->mmio + reg);
}