forked from Minki/linux
PCI: designware: Check for iATU unroll only on platforms that use ATU
Previously we checked for iATU unroll support by reading PCIE_ATU_VIEWPORT even on platforms, e.g., Keystone, that do not have ATU ports. This can cause bad behavior such as asynchronous external aborts: OF: PCI: MEM 0x60000000..0x6fffffff -> 0x60000000 Unhandled fault: asynchronous external abort (0x1211) at 0x00000000 pgd = c0003000 [00000000] *pgd=80000800004003, *pmd=00000000 Internal error: : 1211 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.0-00009-g6ff59d2-dirty #7 Hardware name: Keystone task: eb878000 task.stack: eb866000 PC is at dw_pcie_setup_rc+0x24/0x380 LR is at ks_pcie_host_init+0x10/0x170 Move the dw_pcie_iatu_unroll_enabled() check so we only call it on platforms that do not use the ATU. These platforms supply their own ->rd_other_conf() and ->wr_other_conf() methods. [bhelgaas: changelog] Fixes:a0601a4705
("PCI: designware: Add iATU Unroll feature") Fixes:416379f9eb
("PCI: designware: Check for iATU unroll support after initializing host") Tested-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Joao Pinto <jpinto@synopsys.com> CC: stable@vger.kernel.org # v4.9+
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@ -807,11 +807,6 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
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{
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u32 val;
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/* get iATU unroll support */
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pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
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dev_dbg(pp->dev, "iATU unroll: %s\n",
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pp->iatu_unroll_enabled ? "enabled" : "disabled");
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/* set the number of lanes */
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val = dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL);
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val &= ~PORT_LINK_MODE_MASK;
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@ -882,6 +877,11 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
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* we should not program the ATU here.
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*/
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if (!pp->ops->rd_other_conf) {
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/* get iATU unroll support */
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pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
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dev_dbg(pp->dev, "iATU unroll: %s\n",
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pp->iatu_unroll_enabled ? "enabled" : "disabled");
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dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0,
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PCIE_ATU_TYPE_MEM, pp->mem_base,
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pp->mem_bus_addr, pp->mem_size);
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