drm/etnaviv: move workqueue to be per GPU
While the etnaviv workqueue needs to be ordered, as we rely on work items being executed in queuing order, this is only true for a single GPU. Having a shared workqueue for all GPUs in the system limits concurrency artificially. Getting each GPU its own ordered workqueue still meets our ordering expectations and enables retire workers to run concurrently. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
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@ -580,12 +580,6 @@ static int etnaviv_bind(struct device *dev)
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}
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drm->dev_private = priv;
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priv->wq = alloc_ordered_workqueue("etnaviv", 0);
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if (!priv->wq) {
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ret = -ENOMEM;
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goto out_wq;
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}
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mutex_init(&priv->gem_lock);
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INIT_LIST_HEAD(&priv->gem_list);
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priv->num_gpus = 0;
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@ -607,9 +601,6 @@ static int etnaviv_bind(struct device *dev)
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out_register:
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component_unbind_all(dev, drm);
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out_bind:
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flush_workqueue(priv->wq);
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destroy_workqueue(priv->wq);
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out_wq:
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kfree(priv);
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out_unref:
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drm_dev_unref(drm);
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@ -624,9 +615,6 @@ static void etnaviv_unbind(struct device *dev)
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drm_dev_unregister(drm);
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flush_workqueue(priv->wq);
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destroy_workqueue(priv->wq);
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component_unbind_all(dev, drm);
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drm->dev_private = NULL;
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@ -56,18 +56,8 @@ struct etnaviv_drm_private {
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/* list of GEM objects: */
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struct mutex gem_lock;
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struct list_head gem_list;
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struct workqueue_struct *wq;
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};
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static inline void etnaviv_queue_work(struct drm_device *dev,
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struct work_struct *w)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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queue_work(priv->wq, w);
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}
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int etnaviv_ioctl_gem_submit(struct drm_device *dev, void *data,
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struct drm_file *file);
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@ -958,7 +958,7 @@ static void recover_worker(struct work_struct *work)
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pm_runtime_put_autosuspend(gpu->dev);
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/* Retire the buffer objects in a work */
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etnaviv_queue_work(gpu->drm, &gpu->retire_work);
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queue_work(gpu->wq, &gpu->retire_work);
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}
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static void hangcheck_timer_reset(struct etnaviv_gpu *gpu)
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@ -994,7 +994,7 @@ static void hangcheck_handler(struct timer_list *t)
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dev_err(gpu->dev, " completed fence: %u\n", fence);
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dev_err(gpu->dev, " active fence: %u\n",
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gpu->active_fence);
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etnaviv_queue_work(gpu->drm, &gpu->recover_work);
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queue_work(gpu->wq, &gpu->recover_work);
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}
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/* if still more pending work, reset the hangcheck timer: */
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@ -1526,7 +1526,7 @@ static irqreturn_t irq_handler(int irq, void *data)
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if (gpu->event[event].sync_point) {
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gpu->sync_point_event = event;
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etnaviv_queue_work(gpu->drm, &gpu->sync_point_work);
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queue_work(gpu->wq, &gpu->sync_point_work);
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}
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fence = gpu->event[event].fence;
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@ -1552,7 +1552,7 @@ static irqreturn_t irq_handler(int irq, void *data)
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}
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/* Retire the buffer objects in a work */
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etnaviv_queue_work(gpu->drm, &gpu->retire_work);
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queue_work(gpu->wq, &gpu->retire_work);
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ret = IRQ_HANDLED;
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}
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@ -1721,12 +1721,20 @@ static int etnaviv_gpu_bind(struct device *dev, struct device *master,
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return PTR_ERR(gpu->cooling);
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}
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gpu->wq = alloc_ordered_workqueue(dev_name(dev), 0);
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if (!gpu->wq) {
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if (IS_ENABLED(CONFIG_DRM_ETNAVIV_THERMAL))
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thermal_cooling_device_unregister(gpu->cooling);
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return -ENOMEM;
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}
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#ifdef CONFIG_PM
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ret = pm_runtime_get_sync(gpu->dev);
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#else
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ret = etnaviv_gpu_clk_enable(gpu);
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#endif
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if (ret < 0) {
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destroy_workqueue(gpu->wq);
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if (IS_ENABLED(CONFIG_DRM_ETNAVIV_THERMAL))
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thermal_cooling_device_unregister(gpu->cooling);
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return ret;
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@ -1761,6 +1769,9 @@ static void etnaviv_gpu_unbind(struct device *dev, struct device *master,
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hangcheck_disable(gpu);
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flush_workqueue(gpu->wq);
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destroy_workqueue(gpu->wq);
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#ifdef CONFIG_PM
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pm_runtime_get_sync(gpu->dev);
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pm_runtime_put_sync_suspend(gpu->dev);
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@ -106,6 +106,7 @@ struct etnaviv_gpu {
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struct mutex lock;
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struct etnaviv_chip_identity identity;
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struct etnaviv_file_private *lastctx;
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struct workqueue_struct *wq;
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/* 'ring'-buffer: */
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struct etnaviv_cmdbuf *buffer;
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