clk: qcom: gcc: Fix parent for gpll0_out_even
Documentation says that gpll0 is parent of gpll0_out_even, somehow
driver coded that as bi_tcxo, so fix it
Fixes: 2a1d7eb854
("clk: qcom: gcc: Add global clock controller driver for SM8150")
Reported-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lkml.kernel.org/r/20200521052728.2141377-1-vkoul@kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
parent
3a4ef4ca11
commit
a76f274182
@ -76,8 +76,7 @@ static struct clk_alpha_pll_postdiv gpll0_out_even = {
|
|||||||
.clkr.hw.init = &(struct clk_init_data){
|
.clkr.hw.init = &(struct clk_init_data){
|
||||||
.name = "gpll0_out_even",
|
.name = "gpll0_out_even",
|
||||||
.parent_data = &(const struct clk_parent_data){
|
.parent_data = &(const struct clk_parent_data){
|
||||||
.fw_name = "bi_tcxo",
|
.hw = &gpll0.clkr.hw,
|
||||||
.name = "bi_tcxo",
|
|
||||||
},
|
},
|
||||||
.num_parents = 1,
|
.num_parents = 1,
|
||||||
.ops = &clk_trion_pll_postdiv_ops,
|
.ops = &clk_trion_pll_postdiv_ops,
|
||||||
|
Loading…
Reference in New Issue
Block a user