ARM: dts: sti: update flexgen compatible within stih418-clock
With the introduction of new flexgen compatible within the clk-flexgen driver, remove the clock-output-names entry from the flexgen nodes and set the new proper compatible corresponding. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
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Patrice Chotard
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e73f0f0ee7
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a7056e0423
@@ -83,15 +83,12 @@
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};
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clk_s_a0_flexgen: clk-s-a0-flexgen {
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compatible = "st,flexgen";
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compatible = "st,flexgen", "st,flexgen-stih410-a0";
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#clock-cells = <1>;
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clocks = <&clk_s_a0_pll 0>,
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<&clk_sysin>;
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clock-output-names = "clk-ic-lmi0",
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"clk-ic-lmi1";
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};
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};
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@@ -132,7 +129,7 @@
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clk_s_c0_flexgen: clk-s-c0-flexgen {
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#clock-cells = <1>;
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compatible = "st,flexgen";
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compatible = "st,flexgen", "st,flexgen-stih418-c0";
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clocks = <&clk_s_c0_pll0 0>,
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<&clk_s_c0_pll1 0>,
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@@ -142,49 +139,6 @@
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<&clk_s_c0_quadfs 3>,
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<&clk_sysin>;
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clock-output-names = "clk-icn-gpu",
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"clk-fdma",
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"clk-nand",
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"clk-hva",
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"clk-proc-stfe",
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"clk-tp",
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"clk-rx-icn-dmu",
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"clk-rx-icn-hva",
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"clk-icn-cpu",
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"clk-tx-icn-dmu",
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"clk-mmc-0",
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"clk-mmc-1",
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"clk-jpegdec",
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"clk-icn-reg",
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"clk-proc-bdisp-0",
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"clk-proc-bdisp-1",
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"clk-pp-dmu",
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"clk-vid-dmu",
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"clk-dss-lpc",
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"clk-st231-aud-0",
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"clk-st231-gp-1",
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"clk-st231-dmu",
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"clk-icn-lmi",
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"clk-tx-icn-1",
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"clk-icn-sbc",
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"clk-stfe-frc2",
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"clk-eth-phyref",
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"clk-eth-ref-phyclk",
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"clk-flash-promip",
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"clk-main-disp",
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"clk-aux-disp",
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"clk-compo-dvp",
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"clk-tx-icn-hades",
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"clk-rx-icn-hades",
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"clk-icn-reg-16",
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"clk-pp-hevc",
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"clk-clust-hevc",
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"clk-hwpe-hevc",
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"clk-fc-hevc",
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"clk-proc-mixer",
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"clk-proc-sc",
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"clk-avsp-hevc";
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/*
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* ARM Peripheral clock for timers
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*/
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@@ -221,20 +175,13 @@
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clk_s_d0_flexgen: clk-s-d0-flexgen {
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#clock-cells = <1>;
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compatible = "st,flexgen-audio", "st,flexgen";
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compatible = "st,flexgen", "st,flexgen-stih410-d0";
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clocks = <&clk_s_d0_quadfs 0>,
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<&clk_s_d0_quadfs 1>,
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<&clk_s_d0_quadfs 2>,
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<&clk_s_d0_quadfs 3>,
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<&clk_sysin>;
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clock-output-names = "clk-pcm-0",
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"clk-pcm-1",
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"clk-pcm-2",
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"clk-spdiff",
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"clk-pcmr10-master",
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"clk-usb2-phy";
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};
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};
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@@ -257,7 +204,7 @@
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clk_s_d2_flexgen: clk-s-d2-flexgen {
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#clock-cells = <1>;
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compatible = "st,flexgen-video", "st,flexgen";
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compatible = "st,flexgen", "st,flexgen-stih418-d2";
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clocks = <&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 1>,
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@@ -266,30 +213,6 @@
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<&clk_sysin>,
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<&clk_sysin>,
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<&clk_tmdsout_hdmi>;
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clock-output-names = "clk-pix-main-disp",
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"",
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"",
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"",
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"",
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"clk-tmds-hdmi-div2",
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"clk-pix-aux-disp",
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"clk-denc",
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"clk-pix-hddac",
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"clk-hddac",
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"clk-sddac",
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"clk-pix-dvo",
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"clk-dvo",
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"clk-pix-hdmi",
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"clk-tmds-hdmi",
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"clk-ref-hdmiphy",
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"", "", "", "", "",
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"", "", "", "", "",
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"", "", "", "", "",
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"", "", "", "", "",
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"", "", "", "", "",
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"", "", "", "", "",
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"", "clk-vp9";
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};
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};
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@@ -312,22 +235,13 @@
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clk_s_d3_flexgen: clk-s-d3-flexgen {
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#clock-cells = <1>;
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compatible = "st,flexgen";
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compatible = "st,flexgen", "st,flexgen-stih407-d3";
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clocks = <&clk_s_d3_quadfs 0>,
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<&clk_s_d3_quadfs 1>,
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<&clk_s_d3_quadfs 2>,
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<&clk_s_d3_quadfs 3>,
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<&clk_sysin>;
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clock-output-names = "clk-stfe-frc1",
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"clk-tsout-0",
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"clk-tsout-1",
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"clk-mchi",
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"clk-vsens-compo",
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"clk-frc1-remote",
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"clk-lpc-0",
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"clk-lpc-1";
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};
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};
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};
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