forked from Minki/linux
clocksource/drivers/timer-ti-dm: Move struct omap_dm_timer fields to driver
There is no longer any need to expose the elements of struct omap_dm_timer outside the driver. The pwm and remoteproc drivers just use struct omap_dm_timer as a cookie. Let's move the elements of struct omap_dm_timer into struct dmtimer that is private to the driver. To do this, we mostly rename omap_dm_timer to dmtimer in the driver. We keep omap_dm_timer only for the exposed functions in the platform_data for the pwm and remoteproc drivers. Let's also add a note about not using the exposed functions internally as those will get deprecated eventually in favor of Linux generic frameworks. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Link: https://lore.kernel.org/r/20220815131250.34603-8-tony@atomide.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Tony Lindgren
Daniel Lezcano
parent
bd351f1aee
commit
a6e543f615
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@ -95,6 +95,53 @@
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#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
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(_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
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struct timer_regs {
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u32 ocp_cfg;
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u32 tidr;
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u32 tier;
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u32 twer;
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u32 tclr;
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u32 tcrr;
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u32 tldr;
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u32 ttrg;
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u32 twps;
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u32 tmar;
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u32 tcar1;
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u32 tsicr;
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u32 tcar2;
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u32 tpir;
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u32 tnir;
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u32 tcvr;
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u32 tocr;
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u32 towr;
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};
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struct dmtimer {
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struct omap_dm_timer cookie;
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int id;
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int irq;
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struct clk *fclk;
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void __iomem *io_base;
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int irq_stat; /* TISR/IRQSTATUS interrupt status */
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int irq_ena; /* irq enable */
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int irq_dis; /* irq disable, only on v2 ip */
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void __iomem *pend; /* write pending */
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void __iomem *func_base; /* function register base */
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atomic_t enabled;
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unsigned long rate;
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unsigned reserved:1;
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unsigned posted:1;
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struct timer_regs context;
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int revision;
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u32 capability;
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u32 errata;
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struct platform_device *pdev;
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struct list_head node;
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struct notifier_block nb;
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};
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static u32 omap_reserved_systimers;
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static LIST_HEAD(omap_timer_list);
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static DEFINE_SPINLOCK(dm_timer_lock);
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@ -115,7 +162,7 @@ enum {
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* pending bit must be checked. Otherwise a read of a non completed write
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* will produce an error.
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*/
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static inline u32 dmtimer_read(struct omap_dm_timer *timer, u32 reg)
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static inline u32 dmtimer_read(struct dmtimer *timer, u32 reg)
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{
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u16 wp, offset;
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@ -140,7 +187,7 @@ static inline u32 dmtimer_read(struct omap_dm_timer *timer, u32 reg)
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* pending bit must be checked. Otherwise a write on a register which has a
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* pending write will be lost.
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*/
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static inline void dmtimer_write(struct omap_dm_timer *timer, u32 reg, u32 val)
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static inline void dmtimer_write(struct dmtimer *timer, u32 reg, u32 val)
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{
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u16 wp, offset;
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@ -155,7 +202,7 @@ static inline void dmtimer_write(struct omap_dm_timer *timer, u32 reg, u32 val)
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writel_relaxed(val, timer->func_base + offset);
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}
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static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
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static inline void __omap_dm_timer_init_regs(struct dmtimer *timer)
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{
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u32 tidr;
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@ -190,7 +237,7 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
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* complete. Enabling this feature can improve performance for writing to the
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* timer registers.
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*/
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static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
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static inline void __omap_dm_timer_enable_posted(struct dmtimer *timer)
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{
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if (timer->posted)
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return;
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@ -206,7 +253,7 @@ static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
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timer->posted = OMAP_TIMER_POSTED;
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}
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static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,
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static inline void __omap_dm_timer_stop(struct dmtimer *timer,
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unsigned long rate)
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{
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u32 l;
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@ -230,26 +277,26 @@ static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,
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dmtimer_write(timer, timer->irq_stat, OMAP_TIMER_INT_OVERFLOW);
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}
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static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer,
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unsigned int value)
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static inline void __omap_dm_timer_int_enable(struct dmtimer *timer,
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unsigned int value)
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{
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dmtimer_write(timer, timer->irq_ena, value);
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dmtimer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
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}
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static inline unsigned int
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__omap_dm_timer_read_counter(struct omap_dm_timer *timer)
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__omap_dm_timer_read_counter(struct dmtimer *timer)
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{
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return dmtimer_read(timer, OMAP_TIMER_COUNTER_REG);
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}
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static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer,
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static inline void __omap_dm_timer_write_status(struct dmtimer *timer,
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unsigned int value)
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{
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dmtimer_write(timer, timer->irq_stat, value);
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}
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static void omap_timer_restore_context(struct omap_dm_timer *timer)
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static void omap_timer_restore_context(struct dmtimer *timer)
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{
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dmtimer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, timer->context.ocp_cfg);
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@ -262,7 +309,7 @@ static void omap_timer_restore_context(struct omap_dm_timer *timer)
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dmtimer_write(timer, OMAP_TIMER_CTRL_REG, timer->context.tclr);
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}
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static void omap_timer_save_context(struct omap_dm_timer *timer)
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static void omap_timer_save_context(struct dmtimer *timer)
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{
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timer->context.ocp_cfg = dmtimer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET);
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@ -277,9 +324,9 @@ static void omap_timer_save_context(struct omap_dm_timer *timer)
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static int omap_timer_context_notifier(struct notifier_block *nb,
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unsigned long cmd, void *v)
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{
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struct omap_dm_timer *timer;
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struct dmtimer *timer;
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timer = container_of(nb, struct omap_dm_timer, nb);
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timer = container_of(nb, struct dmtimer, nb);
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switch (cmd) {
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case CPU_CLUSTER_PM_ENTER:
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@ -301,7 +348,7 @@ static int omap_timer_context_notifier(struct notifier_block *nb,
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return NOTIFY_OK;
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}
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static int omap_dm_timer_reset(struct omap_dm_timer *timer)
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static int omap_dm_timer_reset(struct dmtimer *timer)
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{
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u32 l, timeout = 100000;
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@ -329,13 +376,29 @@ static int omap_dm_timer_reset(struct omap_dm_timer *timer)
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return 0;
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}
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static int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
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/*
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* Functions exposed to PWM and remoteproc drivers via platform_data.
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* Do not use these in the driver, these will get deprecated and will
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* will be replaced by Linux generic framework functions such as
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* chained interrupts and clock framework.
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*/
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static struct dmtimer *to_dmtimer(struct omap_dm_timer *cookie)
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{
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if (!cookie)
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return NULL;
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return container_of(cookie, struct dmtimer, cookie);
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}
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static int omap_dm_timer_set_source(struct omap_dm_timer *cookie, int source)
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{
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int ret;
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const char *parent_name;
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struct clk *parent;
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struct dmtimer_platform_data *pdata;
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struct dmtimer *timer;
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timer = to_dmtimer(cookie);
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if (unlikely(!timer) || IS_ERR(timer->fclk))
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return -EINVAL;
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@ -385,8 +448,9 @@ static int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
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return ret;
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}
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static void omap_dm_timer_enable(struct omap_dm_timer *timer)
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static void omap_dm_timer_enable(struct omap_dm_timer *cookie)
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{
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struct dmtimer *timer = to_dmtimer(cookie);
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struct device *dev = &timer->pdev->dev;
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int rc;
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@ -395,14 +459,15 @@ static void omap_dm_timer_enable(struct omap_dm_timer *timer)
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dev_err(dev, "could not enable timer\n");
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}
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static void omap_dm_timer_disable(struct omap_dm_timer *timer)
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static void omap_dm_timer_disable(struct omap_dm_timer *cookie)
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{
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struct dmtimer *timer = to_dmtimer(cookie);
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struct device *dev = &timer->pdev->dev;
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pm_runtime_put_sync(dev);
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}
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static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
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static int omap_dm_timer_prepare(struct dmtimer *timer)
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{
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struct device *dev = &timer->pdev->dev;
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int rc;
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@ -442,9 +507,9 @@ static inline u32 omap_dm_timer_reserved_systimer(int id)
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return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0;
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}
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static struct omap_dm_timer *_omap_dm_timer_request(int req_type, void *data)
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static struct dmtimer *_omap_dm_timer_request(int req_type, void *data)
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{
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struct omap_dm_timer *timer = NULL, *t;
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struct dmtimer *timer = NULL, *t;
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struct device_node *np = NULL;
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unsigned long flags;
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u32 cap = 0;
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@ -528,11 +593,19 @@ found:
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static struct omap_dm_timer *omap_dm_timer_request(void)
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{
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return _omap_dm_timer_request(REQUEST_ANY, NULL);
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struct dmtimer *timer;
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timer = _omap_dm_timer_request(REQUEST_ANY, NULL);
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if (!timer)
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return NULL;
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return &timer->cookie;
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}
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static struct omap_dm_timer *omap_dm_timer_request_specific(int id)
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{
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struct dmtimer *timer;
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/* Requesting timer by ID is not supported when device tree is used */
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if (of_have_populated_dt()) {
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pr_warn("%s: Please use omap_dm_timer_request_by_node()\n",
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@ -540,7 +613,11 @@ static struct omap_dm_timer *omap_dm_timer_request_specific(int id)
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return NULL;
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}
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return _omap_dm_timer_request(REQUEST_BY_ID, &id);
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timer = _omap_dm_timer_request(REQUEST_BY_ID, &id);
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if (!timer)
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return NULL;
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return &timer->cookie;
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}
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/**
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@ -552,14 +629,23 @@ static struct omap_dm_timer *omap_dm_timer_request_specific(int id)
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*/
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static struct omap_dm_timer *omap_dm_timer_request_by_node(struct device_node *np)
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{
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struct dmtimer *timer;
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if (!np)
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return NULL;
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return _omap_dm_timer_request(REQUEST_BY_NODE, np);
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timer = _omap_dm_timer_request(REQUEST_BY_NODE, np);
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if (!timer)
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return NULL;
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return &timer->cookie;
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}
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static int omap_dm_timer_free(struct omap_dm_timer *timer)
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static int omap_dm_timer_free(struct omap_dm_timer *cookie)
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{
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struct dmtimer *timer;
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timer = to_dmtimer(cookie);
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if (unlikely(!timer))
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return -EINVAL;
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@ -570,8 +656,9 @@ static int omap_dm_timer_free(struct omap_dm_timer *timer)
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return 0;
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}
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int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
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int omap_dm_timer_get_irq(struct omap_dm_timer *cookie)
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{
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struct dmtimer *timer = to_dmtimer(cookie);
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if (timer)
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return timer->irq;
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return -EINVAL;
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@ -580,7 +667,7 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
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#if defined(CONFIG_ARCH_OMAP1)
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#include <linux/soc/ti/omap1-io.h>
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static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
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static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *cookie)
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{
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return NULL;
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}
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@ -592,7 +679,7 @@ static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
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__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
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{
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int i = 0;
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struct omap_dm_timer *timer = NULL;
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struct dmtimer *timer = NULL;
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unsigned long flags;
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/* If ARMXOR cannot be idled this function call is unnecessary */
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@ -620,8 +707,10 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
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#else
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static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
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static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *cookie)
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{
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struct dmtimer *timer = to_dmtimer(cookie);
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if (timer && !IS_ERR(timer->fclk))
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return timer->fclk;
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return NULL;
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@ -636,15 +725,19 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
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#endif
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static int omap_dm_timer_start(struct omap_dm_timer *timer)
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static int omap_dm_timer_start(struct omap_dm_timer *cookie)
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{
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struct device *dev = &timer->pdev->dev;
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struct dmtimer *timer;
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struct device *dev;
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int rc;
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u32 l;
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timer = to_dmtimer(cookie);
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if (unlikely(!timer))
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return -EINVAL;
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dev = &timer->pdev->dev;
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rc = pm_runtime_resume_and_get(dev);
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if (rc)
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return rc;
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@ -658,14 +751,18 @@ static int omap_dm_timer_start(struct omap_dm_timer *timer)
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return 0;
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}
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static int omap_dm_timer_stop(struct omap_dm_timer *timer)
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static int omap_dm_timer_stop(struct omap_dm_timer *cookie)
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{
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struct device *dev = &timer->pdev->dev;
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struct dmtimer *timer;
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struct device *dev;
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unsigned long rate = 0;
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timer = to_dmtimer(cookie);
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if (unlikely(!timer))
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return -EINVAL;
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dev = &timer->pdev->dev;
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if (!(timer->capability & OMAP_TIMER_NEEDS_RESET))
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rate = clk_get_rate(timer->fclk);
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@ -676,12 +773,14 @@ static int omap_dm_timer_stop(struct omap_dm_timer *timer)
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return 0;
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}
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static int omap_dm_timer_set_load(struct omap_dm_timer *timer,
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static int omap_dm_timer_set_load(struct omap_dm_timer *cookie,
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unsigned int load)
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{
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struct dmtimer *timer;
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struct device *dev;
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int rc;
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timer = to_dmtimer(cookie);
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if (unlikely(!timer))
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return -EINVAL;
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@ -697,13 +796,15 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer,
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return 0;
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}
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static int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
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static int omap_dm_timer_set_match(struct omap_dm_timer *cookie, int enable,
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unsigned int match)
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{
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struct dmtimer *timer;
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struct device *dev;
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int rc;
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u32 l;
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timer = to_dmtimer(cookie);
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if (unlikely(!timer))
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return -EINVAL;
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@ -725,13 +826,15 @@ static int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
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return 0;
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}
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static int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
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static int omap_dm_timer_set_pwm(struct omap_dm_timer *cookie, int def_on,
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int toggle, int trigger, int autoreload)
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{
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struct dmtimer *timer;
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struct device *dev;
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int rc;
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u32 l;
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timer = to_dmtimer(cookie);
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if (unlikely(!timer))
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return -EINVAL;
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@ -757,12 +860,14 @@ static int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int omap_dm_timer_get_pwm_status(struct omap_dm_timer *timer)
|
||||
static int omap_dm_timer_get_pwm_status(struct omap_dm_timer *cookie)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
struct device *dev;
|
||||
int rc;
|
||||
u32 l;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer))
|
||||
return -EINVAL;
|
||||
|
||||
|
|
@ -778,13 +883,15 @@ static int omap_dm_timer_get_pwm_status(struct omap_dm_timer *timer)
|
|||
return l;
|
||||
}
|
||||
|
||||
static int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer,
|
||||
int prescaler)
|
||||
static int omap_dm_timer_set_prescaler(struct omap_dm_timer *cookie,
|
||||
int prescaler)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
struct device *dev;
|
||||
int rc;
|
||||
u32 l;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer) || prescaler < -1 || prescaler > 7)
|
||||
return -EINVAL;
|
||||
|
||||
|
|
@ -806,12 +913,14 @@ static int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
|
||||
static int omap_dm_timer_set_int_enable(struct omap_dm_timer *cookie,
|
||||
unsigned int value)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
struct device *dev;
|
||||
int rc;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer))
|
||||
return -EINVAL;
|
||||
|
||||
|
|
@ -834,12 +943,14 @@ static int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
|
|||
*
|
||||
* Disables the specified timer interrupts for a timer.
|
||||
*/
|
||||
static int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
|
||||
static int omap_dm_timer_set_int_disable(struct omap_dm_timer *cookie, u32 mask)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
struct device *dev;
|
||||
u32 l = mask;
|
||||
int rc;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer))
|
||||
return -EINVAL;
|
||||
|
||||
|
|
@ -860,10 +971,12 @@ static int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
|
||||
static unsigned int omap_dm_timer_read_status(struct omap_dm_timer *cookie)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
unsigned int l;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer || !atomic_read(&timer->enabled))) {
|
||||
pr_err("%s: timer not available or enabled.\n", __func__);
|
||||
return 0;
|
||||
|
|
@ -874,8 +987,11 @@ static unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
|
|||
return l;
|
||||
}
|
||||
|
||||
static int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
|
||||
static int omap_dm_timer_write_status(struct omap_dm_timer *cookie, unsigned int value)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer || !atomic_read(&timer->enabled)))
|
||||
return -EINVAL;
|
||||
|
||||
|
|
@ -884,8 +1000,11 @@ static int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int
|
|||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
|
||||
static unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *cookie)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer || !atomic_read(&timer->enabled))) {
|
||||
pr_err("%s: timer not iavailable or enabled.\n", __func__);
|
||||
return 0;
|
||||
|
|
@ -894,8 +1013,11 @@ static unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
|
|||
return __omap_dm_timer_read_counter(timer);
|
||||
}
|
||||
|
||||
static int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
|
||||
static int omap_dm_timer_write_counter(struct omap_dm_timer *cookie, unsigned int value)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer || !atomic_read(&timer->enabled))) {
|
||||
pr_err("%s: timer not available or enabled.\n", __func__);
|
||||
return -EINVAL;
|
||||
|
|
@ -910,7 +1032,7 @@ static int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int
|
|||
|
||||
static int __maybe_unused omap_dm_timer_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct omap_dm_timer *timer = dev_get_drvdata(dev);
|
||||
struct dmtimer *timer = dev_get_drvdata(dev);
|
||||
|
||||
atomic_set(&timer->enabled, 0);
|
||||
|
||||
|
|
@ -924,7 +1046,7 @@ static int __maybe_unused omap_dm_timer_runtime_suspend(struct device *dev)
|
|||
|
||||
static int __maybe_unused omap_dm_timer_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct omap_dm_timer *timer = dev_get_drvdata(dev);
|
||||
struct dmtimer *timer = dev_get_drvdata(dev);
|
||||
|
||||
if (!(timer->capability & OMAP_TIMER_ALWON) && timer->func_base)
|
||||
omap_timer_restore_context(timer);
|
||||
|
|
@ -951,7 +1073,7 @@ static const struct of_device_id omap_timer_match[];
|
|||
static int omap_dm_timer_probe(struct platform_device *pdev)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct omap_dm_timer *timer;
|
||||
struct dmtimer *timer;
|
||||
struct device *dev = &pdev->dev;
|
||||
const struct dmtimer_platform_data *pdata;
|
||||
int ret;
|
||||
|
|
@ -1043,7 +1165,7 @@ err_disable:
|
|||
*/
|
||||
static int omap_dm_timer_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct omap_dm_timer *timer;
|
||||
struct dmtimer *timer;
|
||||
unsigned long flags;
|
||||
int ret = -EINVAL;
|
||||
|
||||
|
|
|
|||
|
|
@ -59,50 +59,7 @@
|
|||
#define OMAP_TIMER_NEEDS_RESET 0x10000000
|
||||
#define OMAP_TIMER_HAS_DSP_IRQ 0x08000000
|
||||
|
||||
struct timer_regs {
|
||||
u32 ocp_cfg;
|
||||
u32 tidr;
|
||||
u32 tier;
|
||||
u32 twer;
|
||||
u32 tclr;
|
||||
u32 tcrr;
|
||||
u32 tldr;
|
||||
u32 ttrg;
|
||||
u32 twps;
|
||||
u32 tmar;
|
||||
u32 tcar1;
|
||||
u32 tsicr;
|
||||
u32 tcar2;
|
||||
u32 tpir;
|
||||
u32 tnir;
|
||||
u32 tcvr;
|
||||
u32 tocr;
|
||||
u32 towr;
|
||||
};
|
||||
|
||||
struct omap_dm_timer {
|
||||
int id;
|
||||
int irq;
|
||||
struct clk *fclk;
|
||||
|
||||
void __iomem *io_base;
|
||||
int irq_stat; /* TISR/IRQSTATUS interrupt status */
|
||||
int irq_ena; /* irq enable */
|
||||
int irq_dis; /* irq disable, only on v2 ip */
|
||||
void __iomem *pend; /* write pending */
|
||||
void __iomem *func_base; /* function register base */
|
||||
|
||||
atomic_t enabled;
|
||||
unsigned long rate;
|
||||
unsigned reserved:1;
|
||||
unsigned posted:1;
|
||||
struct timer_regs context;
|
||||
int revision;
|
||||
u32 capability;
|
||||
u32 errata;
|
||||
struct platform_device *pdev;
|
||||
struct list_head node;
|
||||
struct notifier_block nb;
|
||||
};
|
||||
|
||||
int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user