drm/amdgpu: fix documentation for amdgpu_pm.c
Fix DOC link name, clean up formatting in pp_dpm_* section. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -130,11 +130,11 @@ pp_od_clk_voltage
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.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
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.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
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:doc: pp_od_clk_voltage
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:doc: pp_od_clk_voltage
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pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie
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pp_dpm_*
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~
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.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
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.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
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:doc: pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie
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:doc: pp_dpm_sclk pp_dpm_mclk pp_dpm_socclk pp_dpm_fclk pp_dpm_dcefclk pp_dpm_pcie
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pp_power_profile_mode
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pp_power_profile_mode
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~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~~
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@@ -805,8 +805,7 @@ static ssize_t amdgpu_get_pp_feature_status(struct device *dev,
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}
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}
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/**
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/**
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* DOC: pp_dpm_sclk pp_dpm_mclk pp_dpm_socclk pp_dpm_fclk pp_dpm_dcefclk
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* DOC: pp_dpm_sclk pp_dpm_mclk pp_dpm_socclk pp_dpm_fclk pp_dpm_dcefclk pp_dpm_pcie
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* pp_dpm_pcie
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*
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*
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* The amdgpu driver provides a sysfs API for adjusting what power levels
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* The amdgpu driver provides a sysfs API for adjusting what power levels
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* are enabled for a given power state. The files pp_dpm_sclk, pp_dpm_mclk,
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* are enabled for a given power state. The files pp_dpm_sclk, pp_dpm_mclk,
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@@ -822,9 +821,15 @@ static ssize_t amdgpu_get_pp_feature_status(struct device *dev,
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*
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*
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* To manually adjust these states, first select manual using
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* To manually adjust these states, first select manual using
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* power_dpm_force_performance_level.
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* power_dpm_force_performance_level.
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* Secondly,Enter a new value for each level by inputing a string that
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* Secondly, enter a new value for each level by inputing a string that
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* contains " echo xx xx xx > pp_dpm_sclk/mclk/pcie"
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* contains " echo xx xx xx > pp_dpm_sclk/mclk/pcie"
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* E.g., echo 4 5 6 to > pp_dpm_sclk will enable sclk levels 4, 5, and 6.
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* E.g.,
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*
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* .. code-block:: bash
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*
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* echo "4 5 6" > pp_dpm_sclk
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*
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* will enable sclk levels 4, 5, and 6.
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*
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*
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* NOTE: change to the dcefclk max dpm level is not supported now
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* NOTE: change to the dcefclk max dpm level is not supported now
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*/
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*/
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