forked from Minki/linux
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"Further ARM fixes:
- Anson Huang noticed that we were corrupting a register we shouldn't
be during suspend on some CPUs.
- Shengjiu Wang spotted a bug in the 'swp' instruction emulation.
- Will Deacon fixed a bug in the ASID allocator.
- Laura Abbott fixed the kernel permission protection to apply to all
threads running in the system.
- I've fixed two bugs with the domain access control register
handling, one to do with printing an appropriate value at oops
time, and the other to further fix the uaccess_with_memcpy code"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8475/1: SWP emulation: Restore original *data when failed
ARM: 8471/1: need to save/restore arm register(r11) when it is corrupted
ARM: fix uaccess_with_memcpy() with SW_DOMAIN_PAN
ARM: report proper DACR value in oops dumps
ARM: 8464/1: Update all mm structures with section adjustments
ARM: 8465/1: mm: keep reserved ASIDs in sync with mm after multiple rollovers
This commit is contained in:
Linus Torvalds
commit
a5e90b1b07
@ -510,10 +510,14 @@ __copy_to_user_std(void __user *to, const void *from, unsigned long n);
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static inline unsigned long __must_check
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__copy_to_user(void __user *to, const void *from, unsigned long n)
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{
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#ifndef CONFIG_UACCESS_WITH_MEMCPY
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unsigned int __ua_flags = uaccess_save_and_enable();
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n = arm_copy_to_user(to, from, n);
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uaccess_restore(__ua_flags);
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return n;
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#else
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return arm_copy_to_user(to, from, n);
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#endif
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}
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extern unsigned long __must_check
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@ -95,6 +95,22 @@ void __show_regs(struct pt_regs *regs)
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{
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unsigned long flags;
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char buf[64];
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#ifndef CONFIG_CPU_V7M
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unsigned int domain;
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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/*
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* Get the domain register for the parent context. In user
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* mode, we don't save the DACR, so lets use what it should
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* be. For other modes, we place it after the pt_regs struct.
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*/
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if (user_mode(regs))
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domain = DACR_UACCESS_ENABLE;
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else
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domain = *(unsigned int *)(regs + 1);
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#else
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domain = get_domain();
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#endif
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#endif
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show_regs_print_info(KERN_DEFAULT);
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@ -123,21 +139,8 @@ void __show_regs(struct pt_regs *regs)
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#ifndef CONFIG_CPU_V7M
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{
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unsigned int domain = get_domain();
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const char *segment;
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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/*
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* Get the domain register for the parent context. In user
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* mode, we don't save the DACR, so lets use what it should
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* be. For other modes, we place it after the pt_regs struct.
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*/
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if (user_mode(regs))
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domain = DACR_UACCESS_ENABLE;
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else
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domain = *(unsigned int *)(regs + 1);
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#endif
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if ((domain & domain_mask(DOMAIN_USER)) ==
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domain_val(DOMAIN_USER, DOMAIN_NOACCESS))
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segment = "none";
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@ -163,11 +166,11 @@ void __show_regs(struct pt_regs *regs)
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buf[0] = '\0';
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#ifdef CONFIG_CPU_CP15_MMU
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{
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unsigned int transbase, dac = get_domain();
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unsigned int transbase;
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asm("mrc p15, 0, %0, c2, c0\n\t"
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: "=r" (transbase));
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snprintf(buf, sizeof(buf), " Table: %08x DAC: %08x",
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transbase, dac);
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transbase, domain);
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}
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#endif
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asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl));
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@ -36,10 +36,10 @@
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*/
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#define __user_swpX_asm(data, addr, res, temp, B) \
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__asm__ __volatile__( \
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" mov %2, %1\n" \
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"0: ldrex"B" %1, [%3]\n" \
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"1: strex"B" %0, %2, [%3]\n" \
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"0: ldrex"B" %2, [%3]\n" \
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"1: strex"B" %0, %1, [%3]\n" \
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" cmp %0, #0\n" \
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" moveq %1, %2\n" \
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" movne %0, %4\n" \
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"2:\n" \
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" .section .text.fixup,\"ax\"\n" \
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@ -88,6 +88,7 @@ pin_page_for_write(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp)
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static unsigned long noinline
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__copy_to_user_memcpy(void __user *to, const void *from, unsigned long n)
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{
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unsigned long ua_flags;
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int atomic;
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if (unlikely(segment_eq(get_fs(), KERNEL_DS))) {
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@ -118,7 +119,9 @@ __copy_to_user_memcpy(void __user *to, const void *from, unsigned long n)
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if (tocopy > n)
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tocopy = n;
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ua_flags = uaccess_save_and_enable();
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memcpy((void *)to, from, tocopy);
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uaccess_restore(ua_flags);
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to += tocopy;
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from += tocopy;
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n -= tocopy;
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@ -145,14 +148,21 @@ arm_copy_to_user(void __user *to, const void *from, unsigned long n)
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* With frame pointer disabled, tail call optimization kicks in
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* as well making this test almost invisible.
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*/
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if (n < 64)
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return __copy_to_user_std(to, from, n);
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return __copy_to_user_memcpy(to, from, n);
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if (n < 64) {
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unsigned long ua_flags = uaccess_save_and_enable();
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n = __copy_to_user_std(to, from, n);
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uaccess_restore(ua_flags);
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} else {
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n = __copy_to_user_memcpy(to, from, n);
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}
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return n;
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}
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static unsigned long noinline
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__clear_user_memset(void __user *addr, unsigned long n)
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{
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unsigned long ua_flags;
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if (unlikely(segment_eq(get_fs(), KERNEL_DS))) {
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memset((void *)addr, 0, n);
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return 0;
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@ -175,7 +185,9 @@ __clear_user_memset(void __user *addr, unsigned long n)
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if (tocopy > n)
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tocopy = n;
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ua_flags = uaccess_save_and_enable();
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memset((void *)addr, 0, tocopy);
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uaccess_restore(ua_flags);
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addr += tocopy;
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n -= tocopy;
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@ -193,9 +205,14 @@ out:
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unsigned long arm_clear_user(void __user *addr, unsigned long n)
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{
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/* See rational for this in __copy_to_user() above. */
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if (n < 64)
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return __clear_user_std(addr, n);
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return __clear_user_memset(addr, n);
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if (n < 64) {
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unsigned long ua_flags = uaccess_save_and_enable();
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n = __clear_user_std(addr, n);
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uaccess_restore(ua_flags);
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} else {
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n = __clear_user_memset(addr, n);
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}
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return n;
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}
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#if 0
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@ -165,13 +165,28 @@ static void flush_context(unsigned int cpu)
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__flush_icache_all();
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}
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static int is_reserved_asid(u64 asid)
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static bool check_update_reserved_asid(u64 asid, u64 newasid)
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{
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int cpu;
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for_each_possible_cpu(cpu)
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if (per_cpu(reserved_asids, cpu) == asid)
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return 1;
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return 0;
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bool hit = false;
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/*
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* Iterate over the set of reserved ASIDs looking for a match.
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* If we find one, then we can update our mm to use newasid
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* (i.e. the same ASID in the current generation) but we can't
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* exit the loop early, since we need to ensure that all copies
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* of the old ASID are updated to reflect the mm. Failure to do
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* so could result in us missing the reserved ASID in a future
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* generation.
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*/
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for_each_possible_cpu(cpu) {
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if (per_cpu(reserved_asids, cpu) == asid) {
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hit = true;
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per_cpu(reserved_asids, cpu) = newasid;
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}
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}
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return hit;
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}
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static u64 new_context(struct mm_struct *mm, unsigned int cpu)
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@ -181,12 +196,14 @@ static u64 new_context(struct mm_struct *mm, unsigned int cpu)
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u64 generation = atomic64_read(&asid_generation);
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if (asid != 0) {
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u64 newasid = generation | (asid & ~ASID_MASK);
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/*
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* If our current ASID was active during a rollover, we
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* can continue to use it and this was just a false alarm.
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*/
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if (is_reserved_asid(asid))
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return generation | (asid & ~ASID_MASK);
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if (check_update_reserved_asid(asid, newasid))
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return newasid;
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/*
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* We had a valid ASID in a previous life, so try to re-use
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@ -194,7 +211,7 @@ static u64 new_context(struct mm_struct *mm, unsigned int cpu)
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*/
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asid &= ~ASID_MASK;
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if (!__test_and_set_bit(asid, asid_map))
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goto bump_gen;
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return newasid;
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}
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/*
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@ -216,11 +233,8 @@ static u64 new_context(struct mm_struct *mm, unsigned int cpu)
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__set_bit(asid, asid_map);
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cur_idx = asid;
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bump_gen:
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asid |= generation;
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cpumask_clear(mm_cpumask(mm));
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return asid;
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return asid | generation;
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}
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void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
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@ -22,6 +22,7 @@
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#include <linux/memblock.h>
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#include <linux/dma-contiguous.h>
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#include <linux/sizes.h>
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#include <linux/stop_machine.h>
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#include <asm/cp15.h>
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#include <asm/mach-types.h>
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@ -627,12 +628,10 @@ static struct section_perm ro_perms[] = {
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* safe to be called with preemption disabled, as under stop_machine().
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*/
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static inline void section_update(unsigned long addr, pmdval_t mask,
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pmdval_t prot)
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pmdval_t prot, struct mm_struct *mm)
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{
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struct mm_struct *mm;
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pmd_t *pmd;
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mm = current->active_mm;
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pmd = pmd_offset(pud_offset(pgd_offset(mm, addr), addr), addr);
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#ifdef CONFIG_ARM_LPAE
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@ -656,49 +655,82 @@ static inline bool arch_has_strict_perms(void)
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return !!(get_cr() & CR_XP);
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}
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#define set_section_perms(perms, field) { \
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size_t i; \
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unsigned long addr; \
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\
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if (!arch_has_strict_perms()) \
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return; \
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\
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for (i = 0; i < ARRAY_SIZE(perms); i++) { \
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if (!IS_ALIGNED(perms[i].start, SECTION_SIZE) || \
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!IS_ALIGNED(perms[i].end, SECTION_SIZE)) { \
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pr_err("BUG: section %lx-%lx not aligned to %lx\n", \
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perms[i].start, perms[i].end, \
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SECTION_SIZE); \
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continue; \
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} \
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\
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for (addr = perms[i].start; \
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addr < perms[i].end; \
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addr += SECTION_SIZE) \
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section_update(addr, perms[i].mask, \
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perms[i].field); \
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} \
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void set_section_perms(struct section_perm *perms, int n, bool set,
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struct mm_struct *mm)
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{
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size_t i;
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unsigned long addr;
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if (!arch_has_strict_perms())
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return;
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for (i = 0; i < n; i++) {
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if (!IS_ALIGNED(perms[i].start, SECTION_SIZE) ||
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!IS_ALIGNED(perms[i].end, SECTION_SIZE)) {
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pr_err("BUG: section %lx-%lx not aligned to %lx\n",
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perms[i].start, perms[i].end,
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SECTION_SIZE);
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continue;
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}
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for (addr = perms[i].start;
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addr < perms[i].end;
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addr += SECTION_SIZE)
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section_update(addr, perms[i].mask,
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set ? perms[i].prot : perms[i].clear, mm);
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}
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}
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static inline void fix_kernmem_perms(void)
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static void update_sections_early(struct section_perm perms[], int n)
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{
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set_section_perms(nx_perms, prot);
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struct task_struct *t, *s;
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read_lock(&tasklist_lock);
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for_each_process(t) {
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if (t->flags & PF_KTHREAD)
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continue;
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for_each_thread(t, s)
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set_section_perms(perms, n, true, s->mm);
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}
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read_unlock(&tasklist_lock);
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set_section_perms(perms, n, true, current->active_mm);
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set_section_perms(perms, n, true, &init_mm);
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}
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int __fix_kernmem_perms(void *unused)
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{
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update_sections_early(nx_perms, ARRAY_SIZE(nx_perms));
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return 0;
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}
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void fix_kernmem_perms(void)
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{
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stop_machine(__fix_kernmem_perms, NULL, NULL);
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}
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#ifdef CONFIG_DEBUG_RODATA
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int __mark_rodata_ro(void *unused)
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{
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update_sections_early(ro_perms, ARRAY_SIZE(ro_perms));
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return 0;
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}
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void mark_rodata_ro(void)
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{
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set_section_perms(ro_perms, prot);
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stop_machine(__mark_rodata_ro, NULL, NULL);
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}
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void set_kernel_text_rw(void)
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{
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set_section_perms(ro_perms, clear);
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set_section_perms(ro_perms, ARRAY_SIZE(ro_perms), false,
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current->active_mm);
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}
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void set_kernel_text_ro(void)
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{
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set_section_perms(ro_perms, prot);
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set_section_perms(ro_perms, ARRAY_SIZE(ro_perms), true,
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current->active_mm);
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}
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#endif /* CONFIG_DEBUG_RODATA */
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@ -95,7 +95,7 @@ ENDPROC(cpu_v7_dcache_clean_area)
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.equ cpu_v7_suspend_size, 4 * 9
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#ifdef CONFIG_ARM_CPU_SUSPEND
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ENTRY(cpu_v7_do_suspend)
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stmfd sp!, {r4 - r10, lr}
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stmfd sp!, {r4 - r11, lr}
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mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
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mrc p15, 0, r5, c13, c0, 3 @ User r/o thread ID
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stmia r0!, {r4 - r5}
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@ -112,7 +112,7 @@ ENTRY(cpu_v7_do_suspend)
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mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register
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mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control
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stmia r0, {r5 - r11}
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ldmfd sp!, {r4 - r10, pc}
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ldmfd sp!, {r4 - r11, pc}
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ENDPROC(cpu_v7_do_suspend)
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||||
ENTRY(cpu_v7_do_resume)
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||||
|
||||
Loading…
Reference in New Issue
Block a user