iommu/qcom: Mask TLBI addresses correctly
As with arm-smmu from whence this code was borrowed, the IOVAs passed in here happen to be at least page-aligned anyway, but still; oh dear. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
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@ -155,7 +155,7 @@ static void qcom_iommu_tlb_inv_range_nosync(unsigned long iova, size_t size,
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struct qcom_iommu_ctx *ctx = to_ctx(fwspec, fwspec->ids[i]);
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size_t s = size;
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iova &= ~12UL;
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iova = (iova >> 12) << 12;
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iova |= ctx->asid;
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do {
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iommu_writel(ctx, reg, iova);
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