Merge branch 'asoc-5.2' into asoc-5.3
This commit is contained in:
commit
a529819d88
@ -48,6 +48,7 @@
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#define SOF_IPC_FW_READY SOF_GLB_TYPE(0x7U)
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#define SOF_IPC_FW_READY SOF_GLB_TYPE(0x7U)
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#define SOF_IPC_GLB_DAI_MSG SOF_GLB_TYPE(0x8U)
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#define SOF_IPC_GLB_DAI_MSG SOF_GLB_TYPE(0x8U)
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#define SOF_IPC_GLB_TRACE_MSG SOF_GLB_TYPE(0x9U)
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#define SOF_IPC_GLB_TRACE_MSG SOF_GLB_TYPE(0x9U)
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#define SOF_IPC_GLB_GDB_DEBUG SOF_GLB_TYPE(0xAU)
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/*
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/*
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* DSP Command Message Types
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* DSP Command Message Types
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@ -78,6 +79,7 @@
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#define SOF_IPC_COMP_GET_VALUE SOF_CMD_TYPE(0x002)
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#define SOF_IPC_COMP_GET_VALUE SOF_CMD_TYPE(0x002)
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#define SOF_IPC_COMP_SET_DATA SOF_CMD_TYPE(0x003)
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#define SOF_IPC_COMP_SET_DATA SOF_CMD_TYPE(0x003)
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#define SOF_IPC_COMP_GET_DATA SOF_CMD_TYPE(0x004)
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#define SOF_IPC_COMP_GET_DATA SOF_CMD_TYPE(0x004)
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#define SOF_IPC_COMP_NOTIFICATION SOF_CMD_TYPE(0x005)
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/* DAI messages */
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/* DAI messages */
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#define SOF_IPC_DAI_CONFIG SOF_CMD_TYPE(0x001)
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#define SOF_IPC_DAI_CONFIG SOF_CMD_TYPE(0x001)
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@ -153,6 +155,27 @@ struct sof_ipc_compound_hdr {
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uint32_t count; /**< count of 0 means end of compound sequence */
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uint32_t count; /**< count of 0 means end of compound sequence */
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} __packed;
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} __packed;
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/**
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* OOPS header architecture specific data.
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*/
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struct sof_ipc_dsp_oops_arch_hdr {
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uint32_t arch; /* Identifier of architecture */
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uint32_t totalsize; /* Total size of oops message */
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} __packed;
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/**
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* OOPS header platform specific data.
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*/
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struct sof_ipc_dsp_oops_plat_hdr {
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uint32_t configidhi; /* ConfigID hi 32bits */
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uint32_t configidlo; /* ConfigID lo 32bits */
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uint32_t numaregs; /* Special regs num */
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uint32_t stackoffset; /* Offset to stack pointer from beginning of
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* oops message
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*/
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uint32_t stackptr; /* Stack ptr */
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} __packed;
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/** @}*/
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/** @}*/
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#endif
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#endif
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@ -18,6 +18,14 @@
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#define SOF_IPC_MAX_ELEMS 16
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#define SOF_IPC_MAX_ELEMS 16
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/*
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* Firmware boot info flag bits (64-bit)
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*/
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#define SOF_IPC_INFO_BUILD BIT(0)
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#define SOF_IPC_INFO_LOCKS BIT(1)
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#define SOF_IPC_INFO_LOCKSV BIT(2)
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#define SOF_IPC_INFO_GDB BIT(3)
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/* extended data types that can be appended onto end of sof_ipc_fw_ready */
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/* extended data types that can be appended onto end of sof_ipc_fw_ready */
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enum sof_ipc_ext_data {
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enum sof_ipc_ext_data {
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SOF_IPC_EXT_DMA_BUFFER = 0,
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SOF_IPC_EXT_DMA_BUFFER = 0,
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@ -49,16 +57,8 @@ struct sof_ipc_fw_ready {
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uint32_t hostbox_size;
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uint32_t hostbox_size;
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struct sof_ipc_fw_version version;
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struct sof_ipc_fw_version version;
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/* Miscellaneous debug flags showing build/debug features enabled */
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/* Miscellaneous flags */
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union {
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uint64_t flags;
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uint64_t reserved;
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struct {
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uint64_t build:1;
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uint64_t locks:1;
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uint64_t locks_verbose:1;
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uint64_t gdb:1;
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} bits;
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} debug;
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/* reserved for future use */
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/* reserved for future use */
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uint32_t reserved[4];
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uint32_t reserved[4];
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@ -17,7 +17,8 @@
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/* Xtensa Firmware Oops data */
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/* Xtensa Firmware Oops data */
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struct sof_ipc_dsp_oops_xtensa {
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struct sof_ipc_dsp_oops_xtensa {
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struct sof_ipc_hdr hdr;
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struct sof_ipc_dsp_oops_arch_hdr arch_hdr;
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struct sof_ipc_dsp_oops_plat_hdr plat_hdr;
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uint32_t exccause;
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uint32_t exccause;
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uint32_t excvaddr;
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uint32_t excvaddr;
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uint32_t ps;
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uint32_t ps;
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@ -38,7 +39,11 @@ struct sof_ipc_dsp_oops_xtensa {
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uint32_t intenable;
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uint32_t intenable;
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uint32_t interrupt;
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uint32_t interrupt;
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uint32_t sar;
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uint32_t sar;
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uint32_t stack;
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uint32_t debugcause;
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uint32_t windowbase;
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uint32_t windowstart;
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uint32_t excsave1;
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uint32_t ar[];
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} __packed;
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} __packed;
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#endif
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#endif
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@ -26,7 +26,7 @@
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/* SOF ABI version major, minor and patch numbers */
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/* SOF ABI version major, minor and patch numbers */
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#define SOF_ABI_MAJOR 3
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#define SOF_ABI_MAJOR 3
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#define SOF_ABI_MINOR 5
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#define SOF_ABI_MINOR 6
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#define SOF_ABI_PATCH 0
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#define SOF_ABI_PATCH 0
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/* SOF ABI version number. Format within 32bit word is MMmmmppp */
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/* SOF ABI version number. Format within 32bit word is MMmmmppp */
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@ -840,7 +840,14 @@ static int snd_hda_codec_dev_free(struct snd_device *device)
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if (codec->core.type == HDA_DEV_LEGACY)
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if (codec->core.type == HDA_DEV_LEGACY)
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snd_hdac_device_unregister(&codec->core);
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snd_hdac_device_unregister(&codec->core);
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codec_display_power(codec, false);
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codec_display_power(codec, false);
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put_device(hda_codec_dev(codec));
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/*
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* In the case of ASoC HD-audio bus, the device refcount is released in
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* snd_hdac_ext_bus_device_remove() explicitly.
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*/
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if (codec->core.type == HDA_DEV_LEGACY)
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put_device(hda_codec_dev(codec));
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return 0;
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return 0;
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}
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}
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@ -2882,6 +2882,18 @@ static const struct dmi_system_id dmi_platform_intel_quirks[] = {
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RT5670_DEV_GPIO |
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RT5670_DEV_GPIO |
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RT5670_JD_MODE3),
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RT5670_JD_MODE3),
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},
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},
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{
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.callback = rt5670_quirk_cb,
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.ident = "Aegex 10 tablet (RU2)",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"),
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DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"),
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},
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.driver_data = (unsigned long *)(RT5670_DMIC_EN |
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RT5670_DMIC2_INR |
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RT5670_DEV_GPIO |
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RT5670_JD_MODE3),
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},
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{}
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{}
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};
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};
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@ -22,6 +22,7 @@ static unsigned long byt_machine_id;
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#define BYT_THINKPAD_10 1
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#define BYT_THINKPAD_10 1
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#define BYT_POV_P1006W 2
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#define BYT_POV_P1006W 2
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#define BYT_AEGEX_10 3
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static int byt_thinkpad10_quirk_cb(const struct dmi_system_id *id)
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static int byt_thinkpad10_quirk_cb(const struct dmi_system_id *id)
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{
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{
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@ -35,6 +36,12 @@ static int byt_pov_p1006w_quirk_cb(const struct dmi_system_id *id)
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return 1;
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return 1;
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}
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}
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static int byt_aegex10_quirk_cb(const struct dmi_system_id *id)
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{
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byt_machine_id = BYT_AEGEX_10;
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return 1;
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}
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static const struct dmi_system_id byt_table[] = {
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static const struct dmi_system_id byt_table[] = {
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{
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{
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.callback = byt_thinkpad10_quirk_cb,
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.callback = byt_thinkpad10_quirk_cb,
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@ -75,9 +82,18 @@ static const struct dmi_system_id byt_table[] = {
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DMI_EXACT_MATCH(DMI_BOARD_NAME, "0E57"),
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DMI_EXACT_MATCH(DMI_BOARD_NAME, "0E57"),
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},
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},
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},
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},
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{
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/* Aegex 10 tablet (RU2) */
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.callback = byt_aegex10_quirk_cb,
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"),
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DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"),
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},
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},
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{ }
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{ }
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};
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};
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/* The Thinkapd 10 and Aegex 10 tablets have the same ID problem */
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static struct snd_soc_acpi_mach byt_thinkpad_10 = {
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static struct snd_soc_acpi_mach byt_thinkpad_10 = {
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.id = "10EC5640",
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.id = "10EC5640",
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.drv_name = "cht-bsw-rt5672",
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.drv_name = "cht-bsw-rt5672",
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@ -104,6 +120,7 @@ static struct snd_soc_acpi_mach *byt_quirk(void *arg)
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switch (byt_machine_id) {
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switch (byt_machine_id) {
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case BYT_THINKPAD_10:
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case BYT_THINKPAD_10:
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case BYT_AEGEX_10:
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return &byt_thinkpad_10;
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return &byt_thinkpad_10;
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case BYT_POV_P1006W:
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case BYT_POV_P1006W:
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return &byt_pov_p1006w;
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return &byt_pov_p1006w;
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@ -220,17 +220,20 @@ static void bdw_get_registers(struct snd_sof_dev *sdev,
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struct sof_ipc_panic_info *panic_info,
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struct sof_ipc_panic_info *panic_info,
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u32 *stack, size_t stack_words)
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u32 *stack, size_t stack_words)
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{
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{
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/* first read regsisters */
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u32 offset = sdev->dsp_oops_offset;
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sof_mailbox_read(sdev, sdev->dsp_oops_offset, xoops, sizeof(*xoops));
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/* first read registers */
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sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
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/* note: variable AR register array is not read */
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/* then get panic info */
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/* then get panic info */
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sof_mailbox_read(sdev, sdev->dsp_oops_offset + sizeof(*xoops),
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offset += xoops->arch_hdr.totalsize;
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panic_info, sizeof(*panic_info));
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sof_mailbox_read(sdev, offset, panic_info, sizeof(*panic_info));
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/* then get the stack */
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/* then get the stack */
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sof_mailbox_read(sdev, sdev->dsp_oops_offset + sizeof(*xoops) +
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offset += sizeof(*panic_info);
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sizeof(*panic_info), stack,
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sof_mailbox_read(sdev, offset, stack, stack_words * sizeof(u32));
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stack_words * sizeof(u32));
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}
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}
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static void bdw_dump(struct snd_sof_dev *sdev, u32 flags)
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static void bdw_dump(struct snd_sof_dev *sdev, u32 flags)
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@ -265,17 +265,20 @@ static void byt_get_registers(struct snd_sof_dev *sdev,
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struct sof_ipc_panic_info *panic_info,
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struct sof_ipc_panic_info *panic_info,
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u32 *stack, size_t stack_words)
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u32 *stack, size_t stack_words)
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{
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{
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u32 offset = sdev->dsp_oops_offset;
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/* first read regsisters */
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/* first read regsisters */
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sof_mailbox_read(sdev, sdev->dsp_oops_offset, xoops, sizeof(*xoops));
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sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
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/* note: variable AR register array is not read */
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/* then get panic info */
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/* then get panic info */
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sof_mailbox_read(sdev, sdev->dsp_oops_offset + sizeof(*xoops),
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offset += xoops->arch_hdr.totalsize;
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panic_info, sizeof(*panic_info));
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sof_mailbox_read(sdev, offset, panic_info, sizeof(*panic_info));
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/* then get the stack */
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/* then get the stack */
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sof_mailbox_read(sdev, sdev->dsp_oops_offset + sizeof(*xoops) +
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offset += sizeof(*panic_info);
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sizeof(*panic_info), stack,
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sof_mailbox_read(sdev, offset, stack, stack_words * sizeof(u32));
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stack_words * sizeof(u32));
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}
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}
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static void byt_dump(struct snd_sof_dev *sdev, u32 flags)
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static void byt_dump(struct snd_sof_dev *sdev, u32 flags)
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@ -108,17 +108,21 @@ static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
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struct sof_ipc_panic_info *panic_info,
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struct sof_ipc_panic_info *panic_info,
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u32 *stack, size_t stack_words)
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u32 *stack, size_t stack_words)
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{
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{
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u32 offset = sdev->dsp_oops_offset;
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/* first read registers */
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/* first read registers */
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sof_block_read(sdev, sdev->mmio_bar, sdev->dsp_oops_offset, xoops,
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sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
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sizeof(*xoops));
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/* note: variable AR register array is not read */
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/* then get panic info */
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/* then get panic info */
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sof_block_read(sdev, sdev->mmio_bar, sdev->dsp_oops_offset +
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offset += xoops->arch_hdr.totalsize;
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sizeof(*xoops), panic_info, sizeof(*panic_info));
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sof_block_read(sdev, sdev->mmio_bar, offset,
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panic_info, sizeof(*panic_info));
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/* then get the stack */
|
/* then get the stack */
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sof_block_read(sdev, sdev->mmio_bar, sdev->dsp_oops_offset +
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offset += sizeof(*panic_info);
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sizeof(*xoops) + sizeof(*panic_info), stack,
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sof_block_read(sdev, sdev->mmio_bar, offset, stack,
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stack_words * sizeof(u32));
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stack_words * sizeof(u32));
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}
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}
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@ -763,16 +763,19 @@ int snd_sof_ipc_valid(struct snd_sof_dev *sdev)
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}
|
}
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}
|
}
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if (ready->debug.bits.build) {
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if (ready->flags & SOF_IPC_INFO_BUILD) {
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dev_info(sdev->dev,
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dev_info(sdev->dev,
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"Firmware debug build %d on %s-%s - options:\n"
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"Firmware debug build %d on %s-%s - options:\n"
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" GDB: %s\n"
|
" GDB: %s\n"
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" lock debug: %s\n"
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" lock debug: %s\n"
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" lock vdebug: %s\n",
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" lock vdebug: %s\n",
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v->build, v->date, v->time,
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v->build, v->date, v->time,
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ready->debug.bits.gdb ? "enabled" : "disabled",
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ready->flags & SOF_IPC_INFO_GDB ?
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ready->debug.bits.locks ? "enabled" : "disabled",
|
"enabled" : "disabled",
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ready->debug.bits.locks_verbose ? "enabled" : "disabled");
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ready->flags & SOF_IPC_INFO_LOCKS ?
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"enabled" : "disabled",
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||||||
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ready->flags & SOF_IPC_INFO_LOCKSV ?
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||||||
|
"enabled" : "disabled");
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}
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}
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||||||
|
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||||||
/* copy the fw_version into debugfs at first boot */
|
/* copy the fw_version into debugfs at first boot */
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||||||
|
@ -110,7 +110,7 @@ static void xtensa_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack,
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|||||||
u32 stack_words)
|
u32 stack_words)
|
||||||
{
|
{
|
||||||
struct sof_ipc_dsp_oops_xtensa *xoops = oops;
|
struct sof_ipc_dsp_oops_xtensa *xoops = oops;
|
||||||
u32 stack_ptr = xoops->stack;
|
u32 stack_ptr = xoops->plat_hdr.stackptr;
|
||||||
/* 4 * 8chars + 3 ws + 1 terminating NUL */
|
/* 4 * 8chars + 3 ws + 1 terminating NUL */
|
||||||
unsigned char buf[4 * 8 + 3 + 1];
|
unsigned char buf[4 * 8 + 3 + 1];
|
||||||
int i;
|
int i;
|
||||||
|
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Block a user