Merge tag 'imx-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 6.0: - Remove superfluous interrupt-names from imx8mq-tqma8mq RTC device to silence dtbs_check warning. - A few Verdin board fixes on CAN clock frequency, mcp251xfd interrupt, atmel_mxt_ts reset polarity and USB PHY. - Remove duplicated node and fix spi-flash compatible for imx6qdl-kontron-samx6i. - A couple of i.MX8M Plus DHCOM fixes from Marek Vasut on ECSPI1 pinmux and I2C5 GPIO assignment. - A couple of Venice fixes on SAI2 pin settings and phy-mode. - Drop in-band autoneg for 2500base-x phy-mode on ls1028a-qds-65bb board. - Revert the power device name setting change from imx8m-blk-ctrl driver, as it causes issue for sysfs cleanup path. - Fix gpcv2 driver to assert reset before ungating clock. * tag 'imx-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: freescale: verdin-imx8mp: fix atmel_mxt_ts reset polarity arm64: dts: freescale: verdin-imx8mm: fix atmel_mxt_ts reset polarity arm64: dts: imx8mp: Fix I2C5 GPIO assignment on i.MX8M Plus DHCOM arm64: dts: imx8mm-venice-gw7901: fix port/phy validation arm64: dts: verdin-imx8mm: add otg2 pd to usbphy soc: imx: gpcv2: Assert reset before ungating clock arm64: dts: ls1028a-qds-65bb: don't use in-band autoneg for 2500base-x ARM: dts: imx6qdl-kontron-samx6i: fix spi-flash compatible ARM: dts: imx6qdl-kontron-samx6i: remove duplicated node ARM: dts: imx6qdl-vicut1.dtsi: Fix node name backlight_led arm64: dts: imx8mq-tqma8mq: Remove superfluous interrupt-names arm64: dts: imx8mp: Adjust ECSPI1 pinmux on i.MX8M Plus DHCOM arm64: dts: imx8mp-venice-gw74xx: fix sai2 pin settings arm64: dts: imx8mm-verdin: use level interrupt for mcp251xfd arm64: dts: imx8mm-verdin: update CAN clock to 40MHz Revert "soc: imx: imx8m-blk-ctrl: set power device name" Link: https://lore.kernel.org/r/20220823092631.GV149610@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -51,16 +51,6 @@
|
|||||||
vin-supply = <®_3p3v_s5>;
|
vin-supply = <®_3p3v_s5>;
|
||||||
};
|
};
|
||||||
|
|
||||||
reg_3p3v_s0: regulator-3p3v-s0 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
regulator-name = "V_3V3_S0";
|
|
||||||
regulator-min-microvolt = <3300000>;
|
|
||||||
regulator-max-microvolt = <3300000>;
|
|
||||||
regulator-always-on;
|
|
||||||
regulator-boot-on;
|
|
||||||
vin-supply = <®_3p3v_s5>;
|
|
||||||
};
|
|
||||||
|
|
||||||
reg_3p3v_s5: regulator-3p3v-s5 {
|
reg_3p3v_s5: regulator-3p3v-s5 {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "V_3V3_S5";
|
regulator-name = "V_3V3_S5";
|
||||||
@@ -259,7 +249,7 @@
|
|||||||
|
|
||||||
/* default boot source: workaround #1 for errata ERR006282 */
|
/* default boot source: workaround #1 for errata ERR006282 */
|
||||||
smarc_flash: flash@0 {
|
smarc_flash: flash@0 {
|
||||||
compatible = "winbond,w25q16dw", "jedec,spi-nor";
|
compatible = "jedec,spi-nor";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
spi-max-frequency = <20000000>;
|
spi-max-frequency = <20000000>;
|
||||||
};
|
};
|
||||||
|
|||||||
@@ -28,7 +28,7 @@
|
|||||||
enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
|
enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
|
||||||
};
|
};
|
||||||
|
|
||||||
backlight_led: backlight_led {
|
backlight_led: backlight-led {
|
||||||
compatible = "pwm-backlight";
|
compatible = "pwm-backlight";
|
||||||
pwms = <&pwm3 0 5000000 0>;
|
pwms = <&pwm3 0 5000000 0>;
|
||||||
brightness-levels = <0 16 64 255>;
|
brightness-levels = <0 16 64 255>;
|
||||||
|
|||||||
@@ -25,7 +25,6 @@
|
|||||||
&enetc_port0 {
|
&enetc_port0 {
|
||||||
phy-handle = <&slot1_sgmii>;
|
phy-handle = <&slot1_sgmii>;
|
||||||
phy-mode = "2500base-x";
|
phy-mode = "2500base-x";
|
||||||
managed = "in-band-status";
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -626,24 +626,28 @@
|
|||||||
lan1: port@0 {
|
lan1: port@0 {
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
label = "lan1";
|
label = "lan1";
|
||||||
|
phy-mode = "internal";
|
||||||
local-mac-address = [00 00 00 00 00 00];
|
local-mac-address = [00 00 00 00 00 00];
|
||||||
};
|
};
|
||||||
|
|
||||||
lan2: port@1 {
|
lan2: port@1 {
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
label = "lan2";
|
label = "lan2";
|
||||||
|
phy-mode = "internal";
|
||||||
local-mac-address = [00 00 00 00 00 00];
|
local-mac-address = [00 00 00 00 00 00];
|
||||||
};
|
};
|
||||||
|
|
||||||
lan3: port@2 {
|
lan3: port@2 {
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
label = "lan3";
|
label = "lan3";
|
||||||
|
phy-mode = "internal";
|
||||||
local-mac-address = [00 00 00 00 00 00];
|
local-mac-address = [00 00 00 00 00 00];
|
||||||
};
|
};
|
||||||
|
|
||||||
lan4: port@3 {
|
lan4: port@3 {
|
||||||
reg = <3>;
|
reg = <3>;
|
||||||
label = "lan4";
|
label = "lan4";
|
||||||
|
phy-mode = "internal";
|
||||||
local-mac-address = [00 00 00 00 00 00];
|
local-mac-address = [00 00 00 00 00 00];
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -32,10 +32,10 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
/* Fixed clock dedicated to SPI CAN controller */
|
/* Fixed clock dedicated to SPI CAN controller */
|
||||||
clk20m: oscillator {
|
clk40m: oscillator {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
clock-frequency = <20000000>;
|
clock-frequency = <40000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio-keys {
|
gpio-keys {
|
||||||
@@ -202,8 +202,8 @@
|
|||||||
|
|
||||||
can1: can@0 {
|
can1: can@0 {
|
||||||
compatible = "microchip,mcp251xfd";
|
compatible = "microchip,mcp251xfd";
|
||||||
clocks = <&clk20m>;
|
clocks = <&clk40m>;
|
||||||
interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
|
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_LOW>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_can1_int>;
|
pinctrl-0 = <&pinctrl_can1_int>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
@@ -603,7 +603,7 @@
|
|||||||
pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
|
pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
|
||||||
reg = <0x4a>;
|
reg = <0x4a>;
|
||||||
/* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */
|
/* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */
|
||||||
reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
|
reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -745,6 +745,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
&usbphynop2 {
|
&usbphynop2 {
|
||||||
|
power-domains = <&pgc_otg2>;
|
||||||
vcc-supply = <®_vdd_3v3>;
|
vcc-supply = <®_vdd_3v3>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -70,7 +70,7 @@
|
|||||||
&ecspi1 {
|
&ecspi1 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_ecspi1>;
|
pinctrl-0 = <&pinctrl_ecspi1>;
|
||||||
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
|
cs-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -403,8 +403,8 @@
|
|||||||
pinctrl-names = "default", "gpio";
|
pinctrl-names = "default", "gpio";
|
||||||
pinctrl-0 = <&pinctrl_i2c5>;
|
pinctrl-0 = <&pinctrl_i2c5>;
|
||||||
pinctrl-1 = <&pinctrl_i2c5_gpio>;
|
pinctrl-1 = <&pinctrl_i2c5_gpio>;
|
||||||
scl-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
scl-gpios = <&gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||||
sda-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
sda-gpios = <&gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -648,10 +648,10 @@
|
|||||||
|
|
||||||
pinctrl_ecspi1: dhcom-ecspi1-grp {
|
pinctrl_ecspi1: dhcom-ecspi1-grp {
|
||||||
fsl,pins = <
|
fsl,pins = <
|
||||||
MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x44
|
MX8MP_IOMUXC_I2C1_SCL__ECSPI1_SCLK 0x44
|
||||||
MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x44
|
MX8MP_IOMUXC_I2C1_SDA__ECSPI1_MOSI 0x44
|
||||||
MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x44
|
MX8MP_IOMUXC_I2C2_SCL__ECSPI1_MISO 0x44
|
||||||
MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x40
|
MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x40
|
||||||
>;
|
>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -770,10 +770,10 @@
|
|||||||
|
|
||||||
pinctrl_sai2: sai2grp {
|
pinctrl_sai2: sai2grp {
|
||||||
fsl,pins = <
|
fsl,pins = <
|
||||||
MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC
|
MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6
|
||||||
MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00
|
MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
|
||||||
MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK
|
MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6
|
||||||
MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK
|
MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK 0xd6
|
||||||
>;
|
>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -628,7 +628,7 @@
|
|||||||
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
|
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
|
||||||
reg = <0x4a>;
|
reg = <0x4a>;
|
||||||
/* Verdin GPIO_2 (SODIMM 208) */
|
/* Verdin GPIO_2 (SODIMM 208) */
|
||||||
reset-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
|
reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
@@ -705,7 +705,7 @@
|
|||||||
pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
|
pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
|
||||||
reg = <0x4a>;
|
reg = <0x4a>;
|
||||||
/* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */
|
/* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */
|
||||||
reset-gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
|
reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -204,7 +204,6 @@
|
|||||||
reg = <0x51>;
|
reg = <0x51>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_rtc>;
|
pinctrl-0 = <&pinctrl_rtc>;
|
||||||
interrupt-names = "irq";
|
|
||||||
interrupt-parent = <&gpio1>;
|
interrupt-parent = <&gpio1>;
|
||||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||||
quartz-load-femtofarads = <7000>;
|
quartz-load-femtofarads = <7000>;
|
||||||
|
|||||||
@@ -335,6 +335,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
reset_control_assert(domain->reset);
|
||||||
|
|
||||||
/* Enable reset clocks for all devices in the domain */
|
/* Enable reset clocks for all devices in the domain */
|
||||||
ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
|
ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
@@ -342,7 +344,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
|
|||||||
goto out_regulator_disable;
|
goto out_regulator_disable;
|
||||||
}
|
}
|
||||||
|
|
||||||
reset_control_assert(domain->reset);
|
/* delays for reset to propagate */
|
||||||
|
udelay(5);
|
||||||
|
|
||||||
if (domain->bits.pxx) {
|
if (domain->bits.pxx) {
|
||||||
/* request the domain to power up */
|
/* request the domain to power up */
|
||||||
|
|||||||
@@ -243,7 +243,6 @@ static int imx8m_blk_ctrl_probe(struct platform_device *pdev)
|
|||||||
ret = PTR_ERR(domain->power_dev);
|
ret = PTR_ERR(domain->power_dev);
|
||||||
goto cleanup_pds;
|
goto cleanup_pds;
|
||||||
}
|
}
|
||||||
dev_set_name(domain->power_dev, "%s", data->name);
|
|
||||||
|
|
||||||
domain->genpd.name = data->name;
|
domain->genpd.name = data->name;
|
||||||
domain->genpd.power_on = imx8m_blk_ctrl_power_on;
|
domain->genpd.power_on = imx8m_blk_ctrl_power_on;
|
||||||
|
|||||||
Reference in New Issue
Block a user