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Merge tag 'for-linus' of git://github.com/openrisc/linux

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Pull OpenRISC updates from Stafford Horne:
 "This includes two minor cleanups, plus a bug fix for OpenRISC TLB
  flush code that allows the the SMP kernel to boot again"

* tag 'for-linus' of git://github.com/openrisc/linux:
  openrisc: fix SMP tlb flush NULL pointer dereference
  openrisc: signal: remove unused DEBUG_SIG macro
  openrisc: time: don't mark comment as kernel-doc
This commit is contained in:
Linus Torvalds
2021-11-08 09:31:25 -08:00
parent bbdbeb0048 27dff9a9c2
commit a2b03e48e9
4 changed files with 7 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/openrisc/kernel/dma.c
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@@ -33,7 +33,7 @@ page_set_nocache(pte_t *pte, unsigned long addr,
* Flush the page out of the TLB so that the new page flags get * Flush the page out of the TLB so that the new page flags get
* picked up next time there's an access * picked up next time there's an access
*/ */
flush_tlb_page(NULL, addr); flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
/* Flush page out of dcache */ /* Flush page out of dcache */
for (cl = __pa(addr); cl < __pa(next); cl += cpuinfo->dcache_block_size) for (cl = __pa(addr); cl < __pa(next); cl += cpuinfo->dcache_block_size)
@@ -56,7 +56,7 @@ page_clear_nocache(pte_t *pte, unsigned long addr,
* Flush the page out of the TLB so that the new page flags get * Flush the page out of the TLB so that the new page flags get
* picked up next time there's an access * picked up next time there's an access
*/ */
flush_tlb_page(NULL, addr); flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
return 0; return 0;
} }

2
arch/openrisc/kernel/signal.c
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@@ -28,8 +28,6 @@
#include <asm/ucontext.h> #include <asm/ucontext.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
#define DEBUG_SIG 0
struct rt_sigframe { struct rt_sigframe {
struct siginfo info; struct siginfo info;
struct ucontext uc; struct ucontext uc;

6
arch/openrisc/kernel/smp.c
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@@ -268,7 +268,7 @@ static inline void ipi_flush_tlb_range(void *info)
local_flush_tlb_range(NULL, fd->addr1, fd->addr2); local_flush_tlb_range(NULL, fd->addr1, fd->addr2);
} }
static void smp_flush_tlb_range(struct cpumask *cmask, unsigned long start, static void smp_flush_tlb_range(const struct cpumask *cmask, unsigned long start,
unsigned long end) unsigned long end)
{ {
unsigned int cpuid; unsigned int cpuid;
@@ -316,7 +316,9 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
void flush_tlb_range(struct vm_area_struct *vma, void flush_tlb_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end) unsigned long start, unsigned long end)
{ {
smp_flush_tlb_range(mm_cpumask(vma->vm_mm), start, end); const struct cpumask *cmask = vma ? mm_cpumask(vma->vm_mm)
: cpu_online_mask;
smp_flush_tlb_range(cmask, start, end);
} }
/* Instruction cache invalidate - performed on each cpu */ /* Instruction cache invalidate - performed on each cpu */

2
arch/openrisc/kernel/time.c
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@@ -127,7 +127,7 @@ irqreturn_t __irq_entry timer_interrupt(struct pt_regs *regs)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
/** /*
* Clocksource: Based on OpenRISC timer/counter * Clocksource: Based on OpenRISC timer/counter
* *
* This sets up the OpenRISC Tick Timer as a clock source. The tick timer * This sets up the OpenRISC Tick Timer as a clock source. The tick timer