forked from Minki/linux
MMC host:
- dw_mmc: Fix hang on data CRC error - mmci: Fix voltage switch procedure for the stm32 variant - sdhci-iproc: Fix some clock issues for BCM2711 - sdhci-msm: Fixup software timeout value -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmEfq70XHHVsZi5oYW5z c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCmnpw/5AcGohl2QCQsPaFootvgXGqlG cBPw9Ag5sK8GCD+hdEJ9Yj+LPCiLESJsk6+4SeMFFwWfBgDv9z6j8dSfZtAYp06/ lRyT2eI4zIOXWVxTkr7KUdacjF9EySbrTug6m7VN4yNb1dxL6Xsl/frTqk8FmqW7 T7HI67fJM795reqw0PEiWeSL+2191aOLFUp17spYsCdMrsc77cgrrH1AaWyVFFr6 P7C/ZvHHsF3MI3yNPfz4QLwHnGffCCLxTQdeJ+EmMsKGIoQTga1aAl4t3nwb+ZIR b8zRIReGdXXq5bw6BwDzKaTMyyvLN0B85EtfwyVsDsw76evp8QEC6ZMIKvQCB260 jj4fqCpfgkCBLnD2LnkL2vZZ3MQAJ1v3RRlWwChm/FBYVmsVrKjK71ZlMiEt2H9m KZJnQ8t+OoooFjAEb6u+1q8inPtsLjFY9433FWYg1pfiD9STHQ28FTUD7JtYPhvy alxQCqykQChWpMHfhiUzWM2LJSxt/ts5yrvdlrRuIb6uwBrT2841e/2SG+0YCraN Hg3tOs2z/O4EdDYMXH3blJFSi4emzGeDnuLyRFOxI/akvnpucEdpnFvmaSsG5rk5 x6FLljAFiKUM755I14dLsLq1rzqs/E956Fl1g3BNmEsBfZFed6PKLBNRG6shIbAY N6L/4D7VaAeZvek2/Og= =Y+uG -----END PGP SIGNATURE----- Merge tag 'mmc-v5.14-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC host fixes from Ulf Hansson: - dw_mmc: Fix hang on data CRC error - mmci: Fix voltage switch procedure for the stm32 variant - sdhci-iproc: Fix some clock issues for BCM2711 - sdhci-msm: Fixup software timeout value * tag 'mmc-v5.14-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: sdhci-iproc: Set SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN on BCM2711 mmc: sdhci-iproc: Cap min clock frequency on BCM2711 mmc: sdhci-msm: Update the software timeout value for sdhc mmc: mmci: stm32: Check when the voltage switch procedure should be done mmc: dw_mmc: Fix hang on data CRC error
This commit is contained in:
Linus Torvalds
commit
a27c75e554
@ -2018,8 +2018,8 @@ static void dw_mci_tasklet_func(struct tasklet_struct *t)
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continue;
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}
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dw_mci_stop_dma(host);
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send_stop_abort(host, data);
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dw_mci_stop_dma(host);
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state = STATE_SENDING_STOP;
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break;
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}
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@ -2043,10 +2043,10 @@ static void dw_mci_tasklet_func(struct tasklet_struct *t)
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*/
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if (test_and_clear_bit(EVENT_DATA_ERROR,
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&host->pending_events)) {
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dw_mci_stop_dma(host);
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if (!(host->data_status & (SDMMC_INT_DRTO |
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SDMMC_INT_EBE)))
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send_stop_abort(host, data);
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dw_mci_stop_dma(host);
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state = STATE_DATA_ERROR;
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break;
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}
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@ -2079,10 +2079,10 @@ static void dw_mci_tasklet_func(struct tasklet_struct *t)
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*/
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if (test_and_clear_bit(EVENT_DATA_ERROR,
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&host->pending_events)) {
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dw_mci_stop_dma(host);
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if (!(host->data_status & (SDMMC_INT_DRTO |
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SDMMC_INT_EBE)))
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send_stop_abort(host, data);
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dw_mci_stop_dma(host);
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state = STATE_DATA_ERROR;
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break;
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}
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@ -479,8 +479,9 @@ static int sdmmc_post_sig_volt_switch(struct mmci_host *host,
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u32 status;
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int ret = 0;
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if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
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spin_lock_irqsave(&host->lock, flags);
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spin_lock_irqsave(&host->lock, flags);
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if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180 &&
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host->pwr_reg & MCI_STM32_VSWITCHEN) {
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mmci_write_pwrreg(host, host->pwr_reg | MCI_STM32_VSWITCH);
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spin_unlock_irqrestore(&host->lock, flags);
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@ -492,9 +493,11 @@ static int sdmmc_post_sig_volt_switch(struct mmci_host *host,
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writel_relaxed(MCI_STM32_VSWENDC | MCI_STM32_CKSTOPC,
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host->base + MMCICLEAR);
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spin_lock_irqsave(&host->lock, flags);
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mmci_write_pwrreg(host, host->pwr_reg &
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~(MCI_STM32_VSWITCHEN | MCI_STM32_VSWITCH));
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}
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spin_unlock_irqrestore(&host->lock, flags);
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return ret;
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}
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@ -173,6 +173,23 @@ static unsigned int sdhci_iproc_get_max_clock(struct sdhci_host *host)
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return pltfm_host->clock;
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}
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/*
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* There is a known bug on BCM2711's SDHCI core integration where the
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* controller will hang when the difference between the core clock and the bus
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* clock is too great. Specifically this can be reproduced under the following
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* conditions:
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*
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* - No SD card plugged in, polling thread is running, probing cards at
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* 100 kHz.
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* - BCM2711's core clock configured at 500MHz or more
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*
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* So we set 200kHz as the minimum clock frequency available for that SoC.
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*/
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static unsigned int sdhci_iproc_bcm2711_get_min_clock(struct sdhci_host *host)
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{
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return 200000;
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}
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static const struct sdhci_ops sdhci_iproc_ops = {
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.set_clock = sdhci_set_clock,
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.get_max_clock = sdhci_iproc_get_max_clock,
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@ -271,13 +288,15 @@ static const struct sdhci_ops sdhci_iproc_bcm2711_ops = {
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.set_clock = sdhci_set_clock,
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.set_power = sdhci_set_power_and_bus_voltage,
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.get_max_clock = sdhci_iproc_get_max_clock,
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.get_min_clock = sdhci_iproc_bcm2711_get_min_clock,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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};
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static const struct sdhci_pltfm_data sdhci_bcm2711_pltfm_data = {
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.quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
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.quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 |
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SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
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.ops = &sdhci_iproc_bcm2711_ops,
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};
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@ -2089,6 +2089,23 @@ static void sdhci_msm_cqe_disable(struct mmc_host *mmc, bool recovery)
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sdhci_cqe_disable(mmc, recovery);
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}
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static void sdhci_msm_set_timeout(struct sdhci_host *host, struct mmc_command *cmd)
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{
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u32 count, start = 15;
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__sdhci_set_timeout(host, cmd);
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count = sdhci_readb(host, SDHCI_TIMEOUT_CONTROL);
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/*
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* Update software timeout value if its value is less than hardware data
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* timeout value. Qcom SoC hardware data timeout value was calculated
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* using 4 * MCLK * 2^(count + 13). where MCLK = 1 / host->clock.
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*/
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if (cmd && cmd->data && host->clock > 400000 &&
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host->clock <= 50000000 &&
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((1 << (count + start)) > (10 * host->clock)))
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host->data_timeout = 22LL * NSEC_PER_SEC;
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}
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static const struct cqhci_host_ops sdhci_msm_cqhci_ops = {
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.enable = sdhci_msm_cqe_enable,
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.disable = sdhci_msm_cqe_disable,
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@ -2438,6 +2455,7 @@ static const struct sdhci_ops sdhci_msm_ops = {
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.irq = sdhci_msm_cqe_irq,
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.dump_vendor_regs = sdhci_msm_dump_vendor_regs,
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.set_power = sdhci_set_power_noreg,
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.set_timeout = sdhci_msm_set_timeout,
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};
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static const struct sdhci_pltfm_data sdhci_msm_pdata = {
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