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drm/amd/display: skip dsc config for navi10 bring up

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[why] we meet a bug when program dsc register even dsc mode is not
enabled. disable dsc config for now. we will re-visit this issue.

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
hersen wu 2019-03-13 16:21:26 -04:00 committed by Alex Deucher
parent 0fcf90d177
commit 9e14d4f17e
2 changed files with 10 additions and 1 deletions
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9
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
View File

@ -191,6 +191,15 @@ void optc2_set_dsc_config(struct timing_generator *optc,
uint32_t dsc_slice_width)
{
struct optc *optc1 = DCN10TG_FROM_TG(optc);
uint32_t data_format = 0;
/* skip if dsc mode is not changed */
data_format = dm_read_reg(CTX, REG(OPTC_DATA_FORMAT_CONTROL));
data_format = data_format & 0x30; /* bit5:4 */
data_format = data_format >> 4;
if (data_format == dsc_mode)
return;
REG_UPDATE(OPTC_DATA_FORMAT_CONTROL,
OPTC_DSC_MODE, dsc_mode);

2
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
View File

@ -670,7 +670,7 @@ static const struct dc_debug_options debug_defaults_drv = {
.max_downscale_src_width = 5120,/*upto 5K*/
.disable_pplib_wm_range = false,
.scl_reset_length10 = true,
.sanity_checks = true,
.sanity_checks = false,
.disable_tri_buf = true,
};