forked from Minki/linux
arm64: Move cpu feature detection code
This patch moves the CPU feature detection code from
arch/arm64/kernel/{setup.c to cpufeature.c}
The plan is to consolidate all the CPU feature handling
in cpufeature.c.
Apart from changing pr_fmt from "alternatives" to "cpu features",
there are no functional changes.
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Tested-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Suzuki K. Poulose
Catalin Marinas
parent
4b998ff188
commit
9cdf8ec4a8
@ -16,13 +16,31 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define pr_fmt(fmt) "alternatives: " fmt
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#define pr_fmt(fmt) "CPU features: " fmt
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#include <linux/types.h>
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#include <asm/cpu.h>
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#include <asm/cpufeature.h>
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#include <asm/processor.h>
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unsigned long elf_hwcap __read_mostly;
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EXPORT_SYMBOL_GPL(elf_hwcap);
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#ifdef CONFIG_COMPAT
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#define COMPAT_ELF_HWCAP_DEFAULT \
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(COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
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COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
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COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
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COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
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COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV|\
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COMPAT_HWCAP_LPAE)
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unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
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unsigned int compat_elf_hwcap2 __read_mostly;
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#endif
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DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
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static bool
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feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry)
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{
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@ -100,3 +118,93 @@ void check_local_cpu_features(void)
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{
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check_cpu_capabilities(arm64_features, "detected feature:");
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}
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void __init setup_cpu_features(void)
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{
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u64 features;
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s64 block;
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u32 cwg;
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int cls;
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/*
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* Check for sane CTR_EL0.CWG value.
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*/
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cwg = cache_type_cwg();
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cls = cache_line_size();
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if (!cwg)
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pr_warn("No Cache Writeback Granule information, assuming cache line size %d\n",
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cls);
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if (L1_CACHE_BYTES < cls)
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pr_warn("L1_CACHE_BYTES smaller than the Cache Writeback Granule (%d < %d)\n",
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L1_CACHE_BYTES, cls);
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/*
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* ID_AA64ISAR0_EL1 contains 4-bit wide signed feature blocks.
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* The blocks we test below represent incremental functionality
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* for non-negative values. Negative values are reserved.
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*/
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features = read_cpuid(ID_AA64ISAR0_EL1);
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block = cpuid_feature_extract_field(features, 4);
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if (block > 0) {
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switch (block) {
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default:
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case 2:
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elf_hwcap |= HWCAP_PMULL;
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case 1:
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elf_hwcap |= HWCAP_AES;
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case 0:
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break;
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}
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}
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if (cpuid_feature_extract_field(features, 8) > 0)
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elf_hwcap |= HWCAP_SHA1;
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if (cpuid_feature_extract_field(features, 12) > 0)
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elf_hwcap |= HWCAP_SHA2;
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if (cpuid_feature_extract_field(features, 16) > 0)
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elf_hwcap |= HWCAP_CRC32;
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block = cpuid_feature_extract_field(features, 20);
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if (block > 0) {
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switch (block) {
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default:
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case 2:
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elf_hwcap |= HWCAP_ATOMICS;
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case 1:
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/* RESERVED */
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case 0:
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break;
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}
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}
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#ifdef CONFIG_COMPAT
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/*
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* ID_ISAR5_EL1 carries similar information as above, but pertaining to
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* the AArch32 32-bit execution state.
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*/
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features = read_cpuid(ID_ISAR5_EL1);
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block = cpuid_feature_extract_field(features, 4);
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if (block > 0) {
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switch (block) {
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default:
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case 2:
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compat_elf_hwcap2 |= COMPAT_HWCAP2_PMULL;
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case 1:
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compat_elf_hwcap2 |= COMPAT_HWCAP2_AES;
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case 0:
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break;
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}
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}
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if (cpuid_feature_extract_field(features, 8) > 0)
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compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
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if (cpuid_feature_extract_field(features, 12) > 0)
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compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
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if (cpuid_feature_extract_field(features, 16) > 0)
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compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
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#endif
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}
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@ -65,23 +65,6 @@
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#include <asm/efi.h>
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#include <asm/xen/hypervisor.h>
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unsigned long elf_hwcap __read_mostly;
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EXPORT_SYMBOL_GPL(elf_hwcap);
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#ifdef CONFIG_COMPAT
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#define COMPAT_ELF_HWCAP_DEFAULT \
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(COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
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COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
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COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
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COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
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COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV|\
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COMPAT_HWCAP_LPAE)
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unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
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unsigned int compat_elf_hwcap2 __read_mostly;
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#endif
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DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
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phys_addr_t __fdt_pointer __initdata;
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/*
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@ -196,96 +179,6 @@ static void __init smp_build_mpidr_hash(void)
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__flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
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}
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void __init setup_cpu_features(void)
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{
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u64 features;
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s64 block;
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u32 cwg;
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int cls;
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/*
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* Check for sane CTR_EL0.CWG value.
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*/
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cwg = cache_type_cwg();
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cls = cache_line_size();
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if (!cwg)
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pr_warn("No Cache Writeback Granule information, assuming cache line size %d\n",
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cls);
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if (L1_CACHE_BYTES < cls)
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pr_warn("L1_CACHE_BYTES smaller than the Cache Writeback Granule (%d < %d)\n",
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L1_CACHE_BYTES, cls);
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/*
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* ID_AA64ISAR0_EL1 contains 4-bit wide signed feature blocks.
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* The blocks we test below represent incremental functionality
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* for non-negative values. Negative values are reserved.
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*/
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features = read_cpuid(ID_AA64ISAR0_EL1);
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block = cpuid_feature_extract_field(features, 4);
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if (block > 0) {
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switch (block) {
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default:
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case 2:
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elf_hwcap |= HWCAP_PMULL;
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case 1:
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elf_hwcap |= HWCAP_AES;
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case 0:
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break;
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}
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}
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if (cpuid_feature_extract_field(features, 8) > 0)
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elf_hwcap |= HWCAP_SHA1;
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if (cpuid_feature_extract_field(features, 12) > 0)
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elf_hwcap |= HWCAP_SHA2;
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if (cpuid_feature_extract_field(features, 16) > 0)
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elf_hwcap |= HWCAP_CRC32;
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block = cpuid_feature_extract_field(features, 20);
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if (block > 0) {
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switch (block) {
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default:
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case 2:
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elf_hwcap |= HWCAP_ATOMICS;
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case 1:
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/* RESERVED */
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case 0:
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break;
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}
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}
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#ifdef CONFIG_COMPAT
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/*
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* ID_ISAR5_EL1 carries similar information as above, but pertaining to
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* the AArch32 32-bit execution state.
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*/
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features = read_cpuid(ID_ISAR5_EL1);
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block = cpuid_feature_extract_field(features, 4);
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if (block > 0) {
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switch (block) {
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default:
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case 2:
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compat_elf_hwcap2 |= COMPAT_HWCAP2_PMULL;
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case 1:
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compat_elf_hwcap2 |= COMPAT_HWCAP2_AES;
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case 0:
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break;
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}
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}
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if (cpuid_feature_extract_field(features, 8) > 0)
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compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
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if (cpuid_feature_extract_field(features, 12) > 0)
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compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
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if (cpuid_feature_extract_field(features, 16) > 0)
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compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
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#endif
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}
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static void __init setup_machine_fdt(phys_addr_t dt_phys)
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{
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void *dt_virt = fixmap_remap_fdt(dt_phys);
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