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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

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This commit is contained in:
David S. Miller 2014-06-25 22:40:43 -07:00
commit 9b8d90b963
697 changed files with 9738 additions and 5727 deletions
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4
CREDITS
View File

@ -9,6 +9,10 @@
Linus
----------
M: Matt Mackal
E: mpm@selenic.com
D: SLOB slab allocator
N: Matti Aarnio
E: mea@nic.funet.fi
D: Alpha systems hacking, IPv6 and other network related stuff

4
Documentation/DocBook/media/Makefile
View File

@ -202,8 +202,8 @@ $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64
$(MEDIA_OBJ_DIR)/v4l2.xml: $(OBJIMGFILES)
@$($(quiet)gen_xml)
@(ln -sf $(MEDIA_SRC_DIR)/v4l/*xml $(MEDIA_OBJ_DIR)/)
@(ln -sf $(MEDIA_SRC_DIR)/dvb/*xml $(MEDIA_OBJ_DIR)/)
@(ln -sf `cd $(MEDIA_SRC_DIR) && /bin/pwd`/v4l/*xml $(MEDIA_OBJ_DIR)/)
@(ln -sf `cd $(MEDIA_SRC_DIR) && /bin/pwd`/dvb/*xml $(MEDIA_OBJ_DIR)/)
$(MEDIA_OBJ_DIR)/videodev2.h.xml: $(srctree)/include/uapi/linux/videodev2.h $(MEDIA_OBJ_DIR)/v4l2.xml
@$($(quiet)gen_xml)

1
Documentation/accounting/getdelays.c
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@ -314,6 +314,7 @@ int main(int argc, char *argv[])
break;
case 'm':
strncpy(cpumask, optarg, sizeof(cpumask));
cpumask[sizeof(cpumask) - 1] = '\0';
maskset = 1;
printf("cpumask %s maskset %d\n", cpumask, maskset);
break;

14
Documentation/devicetree/bindings/arm/armada-38x.txt
View File

@ -6,5 +6,15 @@ following property:
Required root node property:
- compatible: must contain either "marvell,armada380" or
"marvell,armada385" depending on the variant of the SoC being used.
- compatible: must contain "marvell,armada380"
In addition, boards using the Marvell Armada 385 SoC shall have the
following property before the previous one:
Required root node property:
compatible: must contain "marvell,armada385"
Example:
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";

2
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
View File

@ -48,7 +48,7 @@ adc@12D10000 {
/* NTC thermistor is a hwmon device */
ncp15wb473@0 {
compatible = "ntc,ncp15wb473";
compatible = "murata,ncp15wb473";
pullup-uv = <1800000>;
pullup-ohm = <47000>;
pulldown-ohm = <0>;

20
Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt
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@ -3,11 +3,19 @@ NTC Thermistor hwmon sensors
Requires node properties:
- "compatible" value : one of
"ntc,ncp15wb473"
"ntc,ncp18wb473"
"ntc,ncp21wb473"
"ntc,ncp03wb473"
"ntc,ncp15wl333"
"murata,ncp15wb473"
"murata,ncp18wb473"
"murata,ncp21wb473"
"murata,ncp03wb473"
"murata,ncp15wl333"
/* Usage of vendor name "ntc" is deprecated */
<DEPRECATED> "ntc,ncp15wb473"
<DEPRECATED> "ntc,ncp18wb473"
<DEPRECATED> "ntc,ncp21wb473"
<DEPRECATED> "ntc,ncp03wb473"
<DEPRECATED> "ntc,ncp15wl333"
- "pullup-uv" Pull up voltage in micro volts
- "pullup-ohm" Pull up resistor value in ohms
- "pulldown-ohm" Pull down resistor value in ohms
@ -21,7 +29,7 @@ Read more about iio bindings at
Example:
ncp15wb473@0 {
compatible = "ntc,ncp15wb473";
compatible = "murata,ncp15wb473";
pullup-uv = <1800000>;
pullup-ohm = <47000>;
pulldown-ohm = <0>;

42
Documentation/devicetree/bindings/i2c/i2c-rk3x.txt Normal file
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@ -0,0 +1,42 @@
* Rockchip RK3xxx I2C controller
This driver interfaces with the native I2C controller present in Rockchip
RK3xxx SoCs.
Required properties :
- reg : Offset and length of the register set for the device
- compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or
"rockchip,rk3288-i2c".
- interrupts : interrupt number
- clocks : parent clock
Required on RK3066, RK3188 :
- rockchip,grf : the phandle of the syscon node for the general register
file (GRF)
- on those SoCs an alias with the correct I2C bus ID (bit offset in the GRF)
is also required.
Optional properties :
- clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
Example:
aliases {
i2c0 = &i2c0;
}
i2c0: i2c@2002d000 {
compatible = "rockchip,rk3188-i2c";
reg = <0x2002d000 0x1000>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
rockchip,grf = <&grf>;
clock-names = "i2c";
clocks = <&cru PCLK_I2C0>;
};

41
Documentation/devicetree/bindings/i2c/i2c-sunxi-p2wi.txt Normal file
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@ -0,0 +1,41 @@
* Allwinner P2WI (Push/Pull 2 Wire Interface) controller
Required properties :
- reg : Offset and length of the register set for the device.
- compatible : Should one of the following:
- "allwinner,sun6i-a31-p2wi"
- interrupts : The interrupt line connected to the P2WI peripheral.
- clocks : The gate clk connected to the P2WI peripheral.
- resets : The reset line connected to the P2WI peripheral.
Optional properties :
- clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the
default frequency is 100kHz
A P2WI may contain one child node encoding a P2WI slave device.
Slave device properties:
Required properties:
- reg : the I2C slave address used during the initialization
process to switch from I2C to P2WI mode
Example:
p2wi@01f03400 {
compatible = "allwinner,sun6i-a31-p2wi";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;
clocks = <&apb0_gates 3>;
clock-frequency = <6000000>;
resets = <&apb0_rst 3>;
axp221: pmic@68 {
compatible = "x-powers,axp221";
reg = <0x68>;
/* ... */
};
};

1
Documentation/devicetree/bindings/vendor-prefixes.txt
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@ -83,6 +83,7 @@ mosaixtech Mosaix Technologies, Inc.
moxa Moxa
mpl MPL AG
mundoreader Mundo Reader S.L.
murata Murata Manufacturing Co., Ltd.
mxicy Macronix International Co., Ltd.
national National Semiconductor
neonode Neonode Inc.

8
Documentation/hwmon/ntc_thermistor
View File

@ -1,7 +1,7 @@
Kernel driver ntc_thermistor
=================
Supported thermistors:
Supported thermistors from Murata:
* Murata NTC Thermistors NCP15WB473, NCP18WB473, NCP21WB473, NCP03WB473, NCP15WL333
Prefixes: 'ncp15wb473', 'ncp18wb473', 'ncp21wb473', 'ncp03wb473', 'ncp15wl333'
Datasheet: Publicly available at Murata
@ -15,9 +15,9 @@ Authors:
Description
-----------
The NTC thermistor is a simple thermistor that requires users to provide the
resistance and lookup the corresponding compensation table to get the
temperature input.
The NTC (Negative Temperature Coefficient) thermistor is a simple thermistor
that requires users to provide the resistance and lookup the corresponding
compensation table to get the temperature input.
The NTC driver provides lookup tables with a linear approximation function
and four circuit models with an option not to use any of the four models.

2
Documentation/kbuild/makefiles.txt
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@ -1171,7 +1171,7 @@ When kbuild executes, the following steps are followed (roughly):
obvious reason.
dtc
Create flattend device tree blob object suitable for linking
Create flattened device tree blob object suitable for linking
into vmlinux. Device tree blobs linked into vmlinux are placed
in an init section in the image. Platform code *must* copy the
blob to non-init memory prior to calling unflatten_device_tree().

19
Documentation/kernel-parameters.txt
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@ -1474,6 +1474,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
js= [HW,JOY] Analog joystick
See Documentation/input/joystick.txt.
kaslr/nokaslr [X86]
Enable/disable kernel and module base offset ASLR
(Address Space Layout Randomization) if built into
the kernel. When CONFIG_HIBERNATION is selected,
kASLR is disabled by default. When kASLR is enabled,
hibernation will be disabled.
keepinitrd [HW,ARM]
kernelcore=nn[KMG] [KNL,X86,IA-64,PPC] This parameter
@ -2110,10 +2117,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noapic [SMP,APIC] Tells the kernel to not make use of any
IOAPICs that may be present in the system.
nokaslr [X86]
Disable kernel and module base offset ASLR (Address
Space Layout Randomization) if built into the kernel.
noautogroup Disable scheduler automatic task group creation.
nobats [PPC] Do not use BATs for mapping kernel lowmem
@ -2184,6 +2187,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
in certain environments such as networked servers or
real-time systems.
nohibernate [HIBERNATION] Disable hibernation and resume.
nohz= [KNL] Boottime enable/disable dynamic ticks
Valid arguments: on, off
Default: on
@ -2980,6 +2985,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noresume Don't check if there's a hibernation image
present during boot.
nocompress Don't compress/decompress hibernation images.
no Disable hibernation and resume.
retain_initrd [RAM] Keep initrd memory after extraction
@ -3124,6 +3130,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
[KNL] Should the soft-lockup detector generate panics.
Format: <integer>
softlockup_all_cpu_backtrace=
[KNL] Should the soft-lockup detector generate
backtraces on all cpus.
Format: <integer>
sonypi.*= [HW] Sony Programmable I/O Control Device driver
See Documentation/laptops/sonypi.txt

15
Documentation/memory-hotplug.txt
View File

@ -209,15 +209,12 @@ If memory device is found, memory hotplug code will be called.
4.2 Notify memory hot-add event by hand
------------
On powerpc, the firmware does not notify a memory hotplug event to the kernel.
Therefore, "probe" interface is supported to notify the event to the kernel.
This interface depends on CONFIG_ARCH_MEMORY_PROBE.
CONFIG_ARCH_MEMORY_PROBE is supported on powerpc only. On x86, this config
option is disabled by default since ACPI notifies a memory hotplug event to
the kernel, which performs its hotplug operation as the result. Please
enable this option if you need the "probe" interface for testing purposes
on x86.
On some architectures, the firmware may not notify the kernel of a memory
hotplug event. Therefore, the memory "probe" interface is supported to
explicitly notify the kernel. This interface depends on
CONFIG_ARCH_MEMORY_PROBE and can be configured on powerpc, sh, and x86
if hotplug is supported, although for x86 this should be handled by ACPI
notification.
Probe interface is located at
/sys/devices/system/memory/probe

5
Documentation/ptp/testptp.c
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@ -17,6 +17,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#define _GNU_SOURCE
#include <errno.h>
#include <fcntl.h>
#include <inttypes.h>
@ -46,12 +47,14 @@
#define CLOCK_INVALID -1
#endif
/* When glibc offers the syscall, this will go away. */
/* clock_adjtime is not available in GLIBC < 2.14 */
#if !__GLIBC_PREREQ(2, 14)
#include <sys/syscall.h>
static int clock_adjtime(clockid_t id, struct timex *tx)
{
return syscall(__NR_clock_adjtime, id, tx);
}
#endif
static clockid_t get_clockid(int fd)
{

17
Documentation/sysctl/kernel.txt
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@ -75,6 +75,7 @@ show up in /proc/sys/kernel:
- shmall
- shmmax [ sysv ipc ]
- shmmni
- softlockup_all_cpu_backtrace
- stop-a [ SPARC only ]
- sysrq ==> Documentation/sysrq.txt
- sysctl_writes_strict
@ -783,6 +784,22 @@ via the /proc/sys interface:
==============================================================
softlockup_all_cpu_backtrace:
This value controls the soft lockup detector thread's behavior
when a soft lockup condition is detected as to whether or not
to gather further debug information. If enabled, each cpu will
be issued an NMI and instructed to capture stack trace.
This feature is only applicable for architectures which support
NMI.
0: do nothing. This is the default behavior.
1: on detection capture more debug information.
==============================================================
tainted:
Non-zero if the kernel has been tainted. Numeric values, which

3
Documentation/sysctl/vm.txt
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@ -702,7 +702,8 @@ The batch value of each per cpu pagelist is also updated as a result. It is
set to pcp->high/4. The upper limit of batch is (PAGE_SHIFT * 8)
The initial value is zero. Kernel does not use this value at boot time to set
the high water marks for each per cpu page list.
the high water marks for each per cpu page list. If the user writes '0' to this
sysctl, it will revert to this default behavior.
==============================================================

7
Documentation/thermal/nouveau_thermal
View File

@ -4,7 +4,7 @@ Kernel driver nouveau
Supported chips:
* NV43+
Authors: Martin Peres (mupuf) <martin.peres@labri.fr>
Authors: Martin Peres (mupuf) <martin.peres@free.fr>
Description
---------
@ -68,8 +68,9 @@ Your fan can be driven in different modes:
NOTE: Be sure to use the manual mode if you want to drive the fan speed manually
NOTE2: Not all fan management modes may be supported on all chipsets. We are
working on it.
NOTE2: When operating in manual mode outside the vbios-defined
[PWM_min, PWM_max] range, the reported fan speed (RPM) may not be accurate
depending on your hardware.
Bug reports
---------

32
MAINTAINERS
View File

@ -3190,14 +3190,6 @@ L: linux-scsi@vger.kernel.org
S: Maintained
F: drivers/scsi/eata_pio.*
EBTABLES
L: netfilter-devel@vger.kernel.org
W: http://ebtables.sourceforge.net/
S: Orphan
F: include/linux/netfilter_bridge/ebt_*.h
F: include/uapi/linux/netfilter_bridge/ebt_*.h
F: net/bridge/netfilter/ebt*.c
EC100 MEDIA DRIVER
M: Antti Palosaari <crope@iki.fi>
L: linux-media@vger.kernel.org
@ -6106,12 +6098,11 @@ F: Documentation/networking/s2io.txt
F: Documentation/networking/vxge.txt
F: drivers/net/ethernet/neterion/
NETFILTER/IPTABLES
NETFILTER ({IP,IP6,ARP,EB,NF}TABLES)
M: Pablo Neira Ayuso <pablo@netfilter.org>
M: Patrick McHardy <kaber@trash.net>
M: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
L: netfilter-devel@vger.kernel.org
L: netfilter@vger.kernel.org
L: coreteam@netfilter.org
W: http://www.netfilter.org/
W: http://www.iptables.org/
@ -6961,7 +6952,7 @@ PKUNITY SOC DRIVERS
M: Guan Xuetao <gxt@mprc.pku.edu.cn>
W: http://mprc.pku.edu.cn/~guanxuetao/linux
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
T: git git://github.com/gxt/linux.git
F: drivers/input/serio/i8042-unicore32io.h
F: drivers/i2c/busses/i2c-puv3.c
F: drivers/video/fb-puv3.c
@ -7949,6 +7940,7 @@ F: drivers/mmc/host/sdhci-spear.c
SECURITY SUBSYSTEM
M: James Morris <james.l.morris@oracle.com>
M: Serge E. Hallyn <serge@hallyn.com>
L: linux-security-module@vger.kernel.org (suggested Cc:)
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git
W: http://kernsec.org/
@ -8196,13 +8188,15 @@ S: Maintained
F: drivers/usb/misc/sisusbvga/
SLAB ALLOCATOR
M: Christoph Lameter <cl@linux-foundation.org>
M: Christoph Lameter <cl@linux.com>
M: Pekka Enberg <penberg@kernel.org>
M: Matt Mackall <mpm@selenic.com>
M: David Rientjes <rientjes@google.com>
M: Joonsoo Kim <iamjoonsoo.kim@lge.com>
M: Andrew Morton <akpm@linux-foundation.org>
L: linux-mm@kvack.org
S: Maintained
F: include/linux/sl?b*.h
F: mm/sl?b.c
F: mm/sl?b*
SLEEPABLE READ-COPY UPDATE (SRCU)
M: Lai Jiangshan <laijs@cn.fujitsu.com>
@ -9277,7 +9271,7 @@ UNICORE32 ARCHITECTURE:
M: Guan Xuetao <gxt@mprc.pku.edu.cn>
W: http://mprc.pku.edu.cn/~guanxuetao/linux
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
T: git git://github.com/gxt/linux.git
F: arch/unicore32/
UNIFDEF
@ -9744,6 +9738,14 @@ L: virtualization@lists.linux-foundation.org
S: Supported
F: arch/x86/kernel/cpu/vmware.c
VMWARE BALLOON DRIVER
M: Xavier Deguillard <xdeguillard@vmware.com>
M: Philip Moltmann <moltmann@vmware.com>
M: "VMware, Inc." <pv-drivers@vmware.com>
L: linux-kernel@vger.kernel.org
S: Maintained
F: drivers/misc/vmw_balloon.c
VMWARE VMXNET3 ETHERNET DRIVER
M: Shreyas Bhatewara <sbhatewara@vmware.com>
M: "VMware, Inc." <pv-drivers@vmware.com>

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 16
SUBLEVEL = 0
EXTRAVERSION = -rc1
EXTRAVERSION = -rc2
NAME = Shuffling Zombie Juror
# *DOCUMENTATION*

20
arch/arm/Kconfig
View File

@ -175,13 +175,6 @@ config ARCH_HAS_ILOG2_U32
config ARCH_HAS_ILOG2_U64
bool
config ARCH_HAS_CPUFREQ
bool
help
Internal node to signify that the ARCH has CPUFREQ support
and that the relevant menu configurations are displayed for
it.
config ARCH_HAS_BANDGAP
bool
@ -318,7 +311,6 @@ config ARCH_MULTIPLATFORM
config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family"
select ARCH_HAS_CPUFREQ
select ARM_AMBA
select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR
@ -538,7 +530,6 @@ config ARCH_DOVE
config ARCH_KIRKWOOD
bool "Marvell Kirkwood"
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select CPU_FEROCEON
select GENERIC_CLOCKEVENTS
@ -637,7 +628,6 @@ config ARCH_LPC32XX
config ARCH_PXA
bool "PXA2xx/PXA3xx-based"
depends on MMU
select ARCH_HAS_CPUFREQ
select ARCH_MTD_XIP
select ARCH_REQUIRE_GPIOLIB
select ARM_CPU_SUSPEND if PM
@ -707,7 +697,6 @@ config ARCH_RPC
config ARCH_SA1100
bool "SA1100-based"
select ARCH_HAS_CPUFREQ
select ARCH_MTD_XIP
select ARCH_REQUIRE_GPIOLIB
select ARCH_SPARSEMEM_ENABLE
@ -725,7 +714,6 @@ config ARCH_SA1100
config ARCH_S3C24XX
bool "Samsung S3C24XX SoCs"
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select ATAGS
select CLKDEV_LOOKUP
@ -746,7 +734,6 @@ config ARCH_S3C24XX
config ARCH_S3C64XX
bool "Samsung S3C64XX"
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
select ARM_VIC
@ -809,7 +796,6 @@ config ARCH_S5PC100
config ARCH_S5PV210
bool "Samsung S5PV210/S5PC110"
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_SPARSEMEM_ENABLE
select ATAGS
@ -845,7 +831,6 @@ config ARCH_DAVINCI
config ARCH_OMAP1
bool "TI OMAP1"
depends on MMU
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_OMAP
select ARCH_REQUIRE_GPIOLIB
@ -1009,8 +994,6 @@ source "arch/arm/mach-rockchip/Kconfig"
source "arch/arm/mach-sa1100/Kconfig"
source "arch/arm/plat-samsung/Kconfig"
source "arch/arm/mach-socfpga/Kconfig"
source "arch/arm/mach-spear/Kconfig"
@ -1028,6 +1011,7 @@ source "arch/arm/mach-s5pc100/Kconfig"
source "arch/arm/mach-s5pv210/Kconfig"
source "arch/arm/mach-exynos/Kconfig"
source "arch/arm/plat-samsung/Kconfig"
source "arch/arm/mach-shmobile/Kconfig"
@ -2109,9 +2093,7 @@ endmenu
menu "CPU Power Management"
if ARCH_HAS_CPUFREQ
source "drivers/cpufreq/Kconfig"
endif
source "drivers/cpuidle/Kconfig"

2
arch/arm/boot/dts/Makefile
View File

@ -357,7 +357,7 @@ dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
stih415-b2020.dtb \
stih416-b2000.dtb \
stih416-b2020.dtb \
stih416-b2020-revE.dtb
stih416-b2020e.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-cubieboard.dtb \

2
arch/arm/boot/dts/armada-375-db.dts
View File

@ -91,6 +91,8 @@
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "U-Boot";

2
arch/arm/boot/dts/armada-380.dtsi
View File

@ -16,7 +16,7 @@
/ {
model = "Marvell Armada 380 family SoC";
compatible = "marvell,armada380", "marvell,armada38x";
compatible = "marvell,armada380";
cpus {
#address-cells = <1>;

4
arch/arm/boot/dts/armada-385-db.dts
View File

@ -16,7 +16,7 @@
/ {
model = "Marvell Armada 385 Development Board";
compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada38x";
compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
@ -98,6 +98,8 @@
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "U-Boot";

2
arch/arm/boot/dts/armada-385-rd.dts
View File

@ -17,7 +17,7 @@
/ {
model = "Marvell Armada 385 Reference Design";
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada38x";
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";

2
arch/arm/boot/dts/armada-385.dtsi
View File

@ -16,7 +16,7 @@
/ {
model = "Marvell Armada 385 family SoC";
compatible = "marvell,armada385", "marvell,armada38x";
compatible = "marvell,armada385", "marvell,armada380";
cpus {
#address-cells = <1>;

2
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -20,7 +20,7 @@
/ {
model = "Marvell Armada 38x family SoC";
compatible = "marvell,armada38x";
compatible = "marvell,armada380";
aliases {
gpio0 = &gpio0;

2
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
View File

@ -25,7 +25,7 @@
memory {
device_type = "memory";
reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */
reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
};
soc {

21
arch/arm/boot/dts/at91sam9261.dtsi
View File

@ -568,24 +568,17 @@
#size-cells = <0>;
#interrupt-cells = <1>;
slow_rc_osc: slow_rc_osc {
compatible = "fixed-clock";
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-accuracy = <50000000>;
};
clk32k: slck {
compatible = "atmel,at91sam9260-clk-slow";
#clock-cells = <0>;
clocks = <&slow_rc_osc &slow_xtal>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
clocks = <&main_osc>;
};
plla: pllack {
@ -615,7 +608,7 @@
compatible = "atmel,at91rm9200-clk-master";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
};
@ -632,7 +625,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
prog0: prog0 {
#clock-cells = <0>;

4
arch/arm/boot/dts/at91sam9261ek.dts
View File

@ -20,6 +20,10 @@
reg = <0x20000000 0x4000000>;
};
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <18432000>;
};

4
arch/arm/boot/dts/at91sam9n12.dtsi
View File

@ -132,8 +132,8 @@
<595000000 650000000 3 0>,
<545000000 600000000 0 1>,
<495000000 555000000 1 1>,
<445000000 500000000 1 2>,
<400000000 450000000 1 3>;
<445000000 500000000 2 1>,
<400000000 450000000 3 1>;
};
plladiv: plladivck {

4
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -140,8 +140,8 @@
595000000 650000000 3 0
545000000 600000000 0 1
495000000 555000000 1 1
445000000 500000000 1 2
400000000 450000000 1 3>;
445000000 500000000 2 1
400000000 450000000 3 1>;
};
plladiv: plladivck {

2
arch/arm/boot/dts/exynos4.dtsi
View File

@ -113,7 +113,7 @@
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
};
combiner: interrupt-controller@10440000 {

10
arch/arm/boot/dts/imx51-babbage.dts
View File

@ -315,15 +315,15 @@
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
fsl,cd-controller;
fsl,wp-controller;
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&esdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2>;
cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@ -468,8 +468,8 @@
MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
MX51_PAD_GPIO1_0__SD1_CD 0x20d5
MX51_PAD_GPIO1_1__SD1_WP 0x20d5
MX51_PAD_GPIO1_0__GPIO1_0 0x100
MX51_PAD_GPIO1_1__GPIO1_1 0x100
>;
};

4
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
View File

@ -107,7 +107,7 @@
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
fsl,cd-controller;
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
status = "okay";
};
@ -206,7 +206,7 @@
pinctrl_esdhc1_cd: esdhc1_cd {
fsl,pins = <
MX51_PAD_GPIO1_0__SD1_CD 0x20d5
MX51_PAD_GPIO1_0__GPIO1_0 0xd5
>;
};

38
arch/arm/boot/dts/imx53-m53evk.dts
View File

@ -21,27 +21,25 @@
<0xb0000000 0x20000000>;
};
soc {
display1: display@di1 {
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "bgr666";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1>;
display1: display@di1 {
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "bgr666";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1>;
display-timings {
800x480p60 {
native-mode;
clock-frequency = <31500000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
hback-porch = <88>;
hsync-len = <128>;
vback-porch = <33>;
vfront-porch = <9>;
vsync-len = <3>;
vsync-active = <1>;
};
display-timings {
800x480p60 {
native-mode;
clock-frequency = <31500000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
hback-porch = <88>;
hsync-len = <128>;
vback-porch = <33>;
vfront-porch = <9>;
vsync-len = <3>;
vsync-active = <1>;
};
};

10
arch/arm/boot/dts/imx6dl-hummingboard.dts
View File

@ -143,6 +143,14 @@
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
};
pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
/*
* Similar to pinctrl_usbotg_2, but we want it
* pulled down for a fixed host connection.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
};
@ -178,6 +186,8 @@
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
vbus-supply = <&reg_usbotg_vbus>;
status = "okay";
};

2
arch/arm/boot/dts/imx6q-gw51xx.dts
View File

@ -11,7 +11,7 @@
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-gw54xx.dtsi"
#include "imx6qdl-gw51xx.dtsi"
/ {
model = "Gateworks Ventana i.MX6 Quad GW51XX";

27
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
View File

@ -12,6 +12,19 @@
pinctrl-0 = <&pinctrl_cubox_i_ir>;
};
pwmleds {
compatible = "pwm-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
front {
active-low;
label = "imx6:red:front";
max-brightness = <248>;
pwms = <&pwm1 0 50000>;
};
};
regulators {
compatible = "simple-bus";
@ -109,6 +122,10 @@
>;
};
pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
};
pinctrl_cubox_i_spdif: cubox-i-spdif {
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
};
@ -117,6 +134,14 @@
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
};
pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id {
/*
* The Cubox-i pulls this low, but as it's pointless
* leaving it as a pull-up, even if it is just 10uA.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
};
@ -153,6 +178,8 @@
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>;
vbus-supply = <&reg_usbotg_vbus>;
status = "okay";
};

2
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
View File

@ -161,7 +161,7 @@
status = "okay";
pmic: ltc3676@3c {
compatible = "ltc,ltc3676";
compatible = "lltc,ltc3676";
reg = <0x3c>;
regulators {

4
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
View File

@ -220,7 +220,7 @@
};
pmic: ltc3676@3c {
compatible = "ltc,ltc3676";
compatible = "lltc,ltc3676";
reg = <0x3c>;
regulators {
@ -288,7 +288,7 @@
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks 169>;
clocks = <&clks 201>;
VDDA-supply = <&reg_1p8v>;
VDDIO-supply = <&reg_3p3v>;
};

2
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
View File

@ -234,7 +234,7 @@
};
pmic: ltc3676@3c {
compatible = "ltc,ltc3676";
compatible = "lltc,ltc3676";
reg = <0x3c>;
regulators {

13
arch/arm/boot/dts/imx6qdl-microsom.dtsi
View File

@ -10,14 +10,6 @@
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_microsom_usbotg: microsom-usbotg {
/*
* Similar to pinctrl_usbotg_2, but we want it
* pulled down for a fixed host connection.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
};
};
@ -26,8 +18,3 @@
pinctrl-0 = <&pinctrl_microsom_uart1>;
status = "okay";
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_usbotg>;
};

2
arch/arm/boot/dts/imx6sl.dtsi
View File

@ -686,7 +686,7 @@
compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
reg = <0x02188000 0x4000>;
interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_ENET_REF>,
clocks = <&clks IMX6SL_CLK_ENET>,
<&clks IMX6SL_CLK_ENET_REF>;
clock-names = "ipg", "ahb";
status = "disabled";

4
arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
View File

@ -105,7 +105,6 @@
compatible = "ethernet-phy-id0141.0cb0",
"ethernet-phy-ieee802.3-c22";
reg = <0>;
phy-connection-type = "rgmii-id";
};
ethphy1: ethernet-phy@1 {
@ -113,7 +112,6 @@
compatible = "ethernet-phy-id0141.0cb0",
"ethernet-phy-ieee802.3-c22";
reg = <1>;
phy-connection-type = "rgmii-id";
};
};
@ -121,6 +119,7 @@
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
phy-connection-type = "rgmii-id";
};
};
@ -128,5 +127,6 @@
status = "okay";
ethernet1-port@0 {
phy-handle = <&ethphy1>;
phy-connection-type = "rgmii-id";
};
};

8
arch/arm/boot/dts/stih415.dtsi
View File

@ -169,8 +169,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii0>;
clock-names = "stmmaceth";
clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
clock-names = "stmmaceth", "sti-ethclk";
clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
};
ethernet1: dwmac@fef08000 {
@ -192,8 +192,8 @@
reset-names = "stmmaceth";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii1>;
clock-names = "stmmaceth";
clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
clock-names = "stmmaceth", "sti-ethclk";
clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
};
rc: rc@fe518000 {

0
arch/arm/boot/dts/stih416-b2020-revE.dts → arch/arm/boot/dts/stih416-b2020e.dts
View File

8
arch/arm/boot/dts/stih416.dtsi
View File

@ -175,8 +175,8 @@
reset-names = "stmmaceth";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii0>;
clock-names = "stmmaceth";
clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
clock-names = "stmmaceth", "sti-ethclk";
clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
};
ethernet1: dwmac@fef08000 {
@ -197,8 +197,8 @@
reset-names = "stmmaceth";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii1>;
clock-names = "stmmaceth";
clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
clock-names = "stmmaceth", "sti-ethclk";
clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
};
rc: rc@fe518000 {

1
arch/arm/common/scoop.c
View File

@ -182,7 +182,6 @@ static int scoop_probe(struct platform_device *pdev)
struct scoop_config *inf;
struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
int ret;
int temp;
if (!mem)
return -EINVAL;

1
arch/arm/configs/imx_v6_v7_defconfig
View File

@ -186,6 +186,7 @@ CONFIG_VIDEO_MX3=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_CODA=y
CONFIG_SOC_CAMERA_OV2640=y
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y

2
arch/arm/configs/multi_v7_defconfig
View File

@ -300,6 +300,7 @@ CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=16
CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SDHCI_DOVE=y
@ -352,6 +353,7 @@ CONFIG_MFD_NVEC=y
CONFIG_KEYBOARD_NVEC=y
CONFIG_SERIO_NVEC_PS2=y
CONFIG_NVEC_POWER=y
CONFIG_QCOM_GSBI=y
CONFIG_COMMON_CLK_QCOM=y
CONFIG_MSM_GCC_8660=y
CONFIG_MSM_MMCC_8960=y

2
arch/arm/configs/mvebu_v7_defconfig
View File

@ -14,6 +14,7 @@ CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_375=y
CONFIG_MACH_ARMADA_38X=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_MACH_DOVE=y
CONFIG_NEON=y
# CONFIG_CACHE_L2X0 is not set
# CONFIG_SWP_EMULATE is not set
@ -52,6 +53,7 @@ CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_I2C=y
CONFIG_SPI=y
CONFIG_SPI_ORION=y

1
arch/arm/configs/omap2plus_defconfig
View File

@ -32,6 +32,7 @@ CONFIG_SOC_OMAP5=y
CONFIG_SOC_AM33XX=y
CONFIG_SOC_AM43XX=y
CONFIG_SOC_DRA7XX=y
CONFIG_CACHE_L2X0=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_ERRATA_411920=y
CONFIG_SMP=y

2
arch/arm/include/asm/ftrace.h
View File

@ -52,7 +52,7 @@ extern inline void *return_address(unsigned int level)
#endif
#define ftrace_return_addr(n) return_address(n)
#define ftrace_return_address(n) return_address(n)
#endif /* ifndef __ASSEMBLY__ */

6
arch/arm/include/asm/thread_info.h
View File

@ -114,8 +114,14 @@ static inline struct thread_info *current_thread_info(void)
((unsigned long)(task_thread_info(tsk)->cpu_context.pc))
#define thread_saved_sp(tsk) \
((unsigned long)(task_thread_info(tsk)->cpu_context.sp))
#ifndef CONFIG_THUMB2_KERNEL
#define thread_saved_fp(tsk) \
((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
#else
#define thread_saved_fp(tsk) \
((unsigned long)(task_thread_info(tsk)->cpu_context.r7))
#endif
extern void crunch_task_disable(struct thread_info *);
extern void crunch_task_copy(struct thread_info *, void *);

4
arch/arm/kernel/perf_event_v7.c
View File

@ -1924,7 +1924,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
struct perf_event *event)
{
int idx;
int bit;
int bit = -1;
unsigned int prefix;
unsigned int region;
unsigned int code;
@ -1953,7 +1953,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
}
idx = armv7pmu_get_event_idx(cpuc, event);
if (idx < 0 && krait_event)
if (idx < 0 && bit >= 0)
clear_bit(bit, cpuc->used_mask);
return idx;

7
arch/arm/mach-bcm/Kconfig
View File

@ -1,10 +1,9 @@
config ARCH_BCM
menuconfig ARCH_BCM
bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7
help
This enables support for Broadcom ARM based SoC chips
menu "Broadcom SoC Selection"
depends on ARCH_BCM
if ARCH_BCM
config ARCH_BCM_MOBILE
bool "Broadcom Mobile SoC Support" if ARCH_MULTI_V7
@ -88,4 +87,4 @@ config ARCH_BCM_5301X
different SoC or with the older BCM47XX and BCM53XX based
network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
endmenu
endif

6
arch/arm/mach-berlin/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_BERLIN
menuconfig ARCH_BERLIN
bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select ARM_GIC
@ -9,8 +9,6 @@ config ARCH_BERLIN
if ARCH_BERLIN
menu "Marvell Berlin SoC variants"
config MACH_BERLIN_BG2
bool "Marvell Armada 1500 (BG2)"
select CACHE_L2X0
@ -30,6 +28,4 @@ config MACH_BERLIN_BG2Q
select HAVE_ARM_TWD if SMP
select PINCTRL_BERLIN_BG2Q
endmenu
endif

7
arch/arm/mach-cns3xxx/Kconfig
View File

@ -1,12 +1,11 @@
config ARCH_CNS3XXX
menuconfig ARCH_CNS3XXX
bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
select ARM_GIC
select PCI_DOMAINS if PCI
help
Support for Cavium Networks CNS3XXX platform.
menu "CNS3XXX platform type"
depends on ARCH_CNS3XXX
if ARCH_CNS3XXX
config MACH_CNS3420VB
bool "Support for CNS3420 Validation Board"
@ -17,4 +16,4 @@ config MACH_CNS3420VB
This is a platform with an on-board ARM11 MPCore and has support
for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc.
endmenu
endif

1
arch/arm/mach-davinci/Kconfig
View File

@ -39,7 +39,6 @@ config ARCH_DAVINCI_DA830
config ARCH_DAVINCI_DA850
bool "DA850/OMAP-L138/AM18x based system"
select ARCH_DAVINCI_DA8XX
select ARCH_HAS_CPUFREQ
select CP_INTC
config ARCH_DAVINCI_DA8XX

7
arch/arm/mach-exynos/Kconfig
View File

@ -7,10 +7,9 @@
# Configuration options for the EXYNOS4
config ARCH_EXYNOS
menuconfig ARCH_EXYNOS
bool "Samsung EXYNOS" if ARCH_MULTI_V7
select ARCH_HAS_BANDGAP
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
@ -30,8 +29,6 @@ config ARCH_EXYNOS
if ARCH_EXYNOS
menu "SAMSUNG EXYNOS SoCs Support"
config ARCH_EXYNOS3
bool "SAMSUNG EXYNOS3"
select ARM_CPU_SUSPEND if PM
@ -118,8 +115,6 @@ config SOC_EXYNOS5800
default y
depends on SOC_EXYNOS5420
endmenu
config EXYNOS5420_MCPM
bool "Exynos5420 Multi-Cluster PM support"
depends on MCPM && SOC_EXYNOS5420

1
arch/arm/mach-exynos/common.h
View File

@ -118,6 +118,7 @@ extern void __iomem *sysram_ns_base_addr;
extern void __iomem *sysram_base_addr;
void exynos_init_io(void);
void exynos_restart(enum reboot_mode mode, const char *cmd);
void exynos_sysram_init(void);
void exynos_cpuidle_init(void);
void exynos_cpufreq_init(void);
void exynos_init_late(void);

31
arch/arm/mach-exynos/exynos.c
View File

@ -184,6 +184,28 @@ void __init exynos_cpufreq_init(void)
platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
}
void __iomem *sysram_base_addr;
void __iomem *sysram_ns_base_addr;
void __init exynos_sysram_init(void)
{
struct device_node *node;
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
if (!of_device_is_available(node))
continue;
sysram_base_addr = of_iomap(node, 0);
break;
}
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
if (!of_device_is_available(node))
continue;
sysram_ns_base_addr = of_iomap(node, 0);
break;
}
}
void __init exynos_init_late(void)
{
if (of_machine_is_compatible("samsung,exynos5440"))
@ -198,7 +220,7 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
int depth, void *data)
{
struct map_desc iodesc;
__be32 *reg;
const __be32 *reg;
int len;
if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
@ -271,6 +293,13 @@ static void __init exynos_dt_machine_init(void)
}
}
/*
* This is called from smp_prepare_cpus if we've built for SMP, but
* we still need to set it up for PM and firmware ops if not.
*/
if (!IS_ENABLED(SMP))
exynos_sysram_init();
exynos_cpuidle_init();
exynos_cpufreq_init();

8
arch/arm/mach-exynos/hotplug.c
View File

@ -46,13 +46,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
if (cpu == 1)
exynos_cpu_power_down(cpu);
/*
* here's the WFI
*/
asm(".word 0xe320f003\n"
:
:
: "memory", "cc");
wfi();
if (pen_release == cpu_logical_map(cpu)) {
/*

11
arch/arm/mach-exynos/mcpm-exynos.c
View File

@ -25,7 +25,6 @@
#define EXYNOS5420_CPUS_PER_CLUSTER 4
#define EXYNOS5420_NR_CLUSTERS 2
#define MCPM_BOOT_ADDR_OFFSET 0x1c
/*
* The common v7_exit_coherency_flush API could not be used because of the
@ -343,11 +342,13 @@ static int __init exynos_mcpm_init(void)
pr_info("Exynos MCPM support installed\n");
/*
* Future entries into the kernel can now go
* through the cluster entry vectors.
* U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
* as part of secondary_cpu_start(). Let's redirect it to the
* mcpm_entry_point().
*/
__raw_writel(virt_to_phys(mcpm_entry_point),
ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET);
__raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */
__raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */
__raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
iounmap(ns_sram_base_addr);

26
arch/arm/mach-exynos/platsmp.c
View File

@ -32,28 +32,6 @@
extern void exynos4_secondary_startup(void);
void __iomem *sysram_base_addr;
void __iomem *sysram_ns_base_addr;
static void __init exynos_smp_prepare_sysram(void)
{
struct device_node *node;
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
if (!of_device_is_available(node))
continue;
sysram_base_addr = of_iomap(node, 0);
break;
}
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
if (!of_device_is_available(node))
continue;
sysram_ns_base_addr = of_iomap(node, 0);
break;
}
}
static inline void __iomem *cpu_boot_reg_base(void)
{
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
@ -234,11 +212,11 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{
int i;
exynos_sysram_init();
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
scu_enable(scu_base_addr());
exynos_smp_prepare_sysram();
/*
* Write the address of secondary startup into the
* system-wide flags register. The boot monitor waits

15
arch/arm/mach-exynos/pm.c
View File

@ -300,7 +300,7 @@ static int exynos_pm_suspend(void)
tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
__raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
if (!soc_is_exynos5250())
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
exynos_cpu_save_register();
return 0;
@ -334,7 +334,7 @@ static void exynos_pm_resume(void)
if (exynos_pm_central_resume())
goto early_wakeup;
if (!soc_is_exynos5250())
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
exynos_cpu_restore_register();
/* For release retention */
@ -353,7 +353,7 @@ static void exynos_pm_resume(void)
s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
if (!soc_is_exynos5250())
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
scu_enable(S5P_VA_SCU);
early_wakeup:
@ -440,15 +440,18 @@ static int exynos_cpu_pm_notifier(struct notifier_block *self,
case CPU_PM_ENTER:
if (cpu == 0) {
exynos_pm_central_suspend();
exynos_cpu_save_register();
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
exynos_cpu_save_register();
}
break;
case CPU_PM_EXIT:
if (cpu == 0) {
if (!soc_is_exynos5250())
if (read_cpuid_part_number() ==
ARM_CPU_PART_CORTEX_A9) {
scu_enable(S5P_VA_SCU);
exynos_cpu_restore_register();
exynos_cpu_restore_register();
}
exynos_pm_central_resume();
}
break;

1
arch/arm/mach-highbank/Kconfig
View File

@ -1,7 +1,6 @@
config ARCH_HIGHBANK
bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_HAS_OPP
select ARCH_SUPPORTS_BIG_ENDIAN

22
arch/arm/mach-imx/Kconfig
View File

@ -1,6 +1,5 @@
config ARCH_MXC
menuconfig ARCH_MXC
bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select ARCH_REQUIRE_GPIOLIB
select ARM_CPU_SUSPEND if PM
@ -13,8 +12,7 @@ config ARCH_MXC
help
Support for Freescale MXC/iMX-based family of processors
menu "Freescale i.MX support"
depends on ARCH_MXC
if ARCH_MXC
config MXC_TZIC
bool
@ -99,7 +97,6 @@ config SOC_IMX25
config SOC_IMX27
bool
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select CPU_ARM926T
select IMX_HAVE_IOMUX_V1
@ -124,7 +121,6 @@ config SOC_IMX35
config SOC_IMX5
bool
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select ARCH_MXC_IOMUX_V3
select MXC_TZIC
@ -738,9 +734,9 @@ config SOC_IMX6
select HAVE_IMX_MMDC
select HAVE_IMX_SRC
select MFD_SYSCON
select PL310_ERRATA_588369 if CACHE_PL310
select PL310_ERRATA_727915 if CACHE_PL310
select PL310_ERRATA_769419 if CACHE_PL310
select PL310_ERRATA_588369 if CACHE_L2X0
select PL310_ERRATA_727915 if CACHE_L2X0
select PL310_ERRATA_769419 if CACHE_L2X0
config SOC_IMX6Q
bool "i.MX6 Quad/DualLite support"
@ -775,9 +771,9 @@ config SOC_VF610
select ARM_GIC
select PINCTRL_VF610
select VF_PIT_TIMER
select PL310_ERRATA_588369 if CACHE_PL310
select PL310_ERRATA_727915 if CACHE_PL310
select PL310_ERRATA_769419 if CACHE_PL310
select PL310_ERRATA_588369 if CACHE_L2X0
select PL310_ERRATA_727915 if CACHE_L2X0
select PL310_ERRATA_769419 if CACHE_L2X0
help
This enable support for Freescale Vybrid VF610 processor.
@ -786,4 +782,4 @@ endif
source "arch/arm/mach-imx/devices/Kconfig"
endmenu
endif

1
arch/arm/mach-imx/clk-imx6sl.c
View File

@ -312,6 +312,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
clks[IMX6SL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12);
clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14);
clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16);

2
arch/arm/mach-integrator/Kconfig
View File

@ -28,7 +28,7 @@ config ARCH_CINTEGRATOR
bool
config INTEGRATOR_IMPD1
tristate "Include support for Integrator/IM-PD1"
bool "Include support for Integrator/IM-PD1"
depends on ARCH_INTEGRATOR_AP
select ARCH_REQUIRE_GPIOLIB
select ARM_VIC

12
arch/arm/mach-integrator/impd1.c
View File

@ -308,7 +308,12 @@ static struct impd1_device impd1_devs[] = {
*/
#define IMPD1_VALID_IRQS 0x00000bffU
static int __init impd1_probe(struct lm_device *dev)
/*
* As this module is bool, it is OK to have this as __init_refok() - no
* probe calls will be done after the initial system bootup, as devices
* are discovered as part of the machine startup.
*/
static int __init_refok impd1_probe(struct lm_device *dev)
{
struct impd1_module *impd1;
int irq_base;
@ -397,6 +402,11 @@ static void impd1_remove(struct lm_device *dev)
static struct lm_driver impd1_driver = {
.drv = {
.name = "impd1",
/*
* As we're dropping the probe() function, suppress driver
* binding from sysfs.
*/
.suppress_bind_attrs = true,
},
.probe = impd1_probe,
.remove = impd1_remove,

26
arch/arm/mach-integrator/integrator_ap.c
View File

@ -480,25 +480,18 @@ static const struct of_device_id ebi_match[] = {
static void __init ap_init_of(void)
{
unsigned long sc_dec;
struct device_node *root;
struct device_node *syscon;
struct device_node *ebi;
struct device *parent;
struct soc_device *soc_dev;
struct soc_device_attribute *soc_dev_attr;
u32 ap_sc_id;
int err;
int i;
/* Here we create an SoC device for the root node */
root = of_find_node_by_path("/");
if (!root)
return;
syscon = of_find_matching_node(root, ap_syscon_match);
syscon = of_find_matching_node(NULL, ap_syscon_match);
if (!syscon)
return;
ebi = of_find_matching_node(root, ebi_match);
ebi = of_find_matching_node(NULL, ebi_match);
if (!ebi)
return;
@ -509,19 +502,17 @@ static void __init ap_init_of(void)
if (!ebi_base)
return;
of_platform_populate(NULL, of_default_bus_match_table,
ap_auxdata_lookup, NULL);
ap_sc_id = readl(ap_syscon_base);
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
if (!soc_dev_attr)
return;
err = of_property_read_string(root, "compatible",
&soc_dev_attr->soc_id);
if (err)
return;
err = of_property_read_string(root, "model", &soc_dev_attr->machine);
if (err)
return;
soc_dev_attr->soc_id = "XVC";
soc_dev_attr->machine = "Integrator/AP";
soc_dev_attr->family = "Integrator";
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
'A' + (ap_sc_id & 0x0f));
@ -536,9 +527,6 @@ static void __init ap_init_of(void)
parent = soc_device_to_device(soc_dev);
integrator_init_sysfs(parent, ap_sc_id);
of_platform_populate(root, of_default_bus_match_table,
ap_auxdata_lookup, parent);
sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
for (i = 0; i < 4; i++) {
struct lm_device *lmdev;

23
arch/arm/mach-integrator/integrator_cp.c
View File

@ -279,20 +279,13 @@ static const struct of_device_id intcp_syscon_match[] = {
static void __init intcp_init_of(void)
{
struct device_node *root;
struct device_node *cpcon;
struct device *parent;
struct soc_device *soc_dev;
struct soc_device_attribute *soc_dev_attr;
u32 intcp_sc_id;
int err;
/* Here we create an SoC device for the root node */
root = of_find_node_by_path("/");
if (!root)
return;
cpcon = of_find_matching_node(root, intcp_syscon_match);
cpcon = of_find_matching_node(NULL, intcp_syscon_match);
if (!cpcon)
return;
@ -300,19 +293,17 @@ static void __init intcp_init_of(void)
if (!intcp_con_base)
return;
of_platform_populate(NULL, of_default_bus_match_table,
intcp_auxdata_lookup, NULL);
intcp_sc_id = readl(intcp_con_base);
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
if (!soc_dev_attr)
return;
err = of_property_read_string(root, "compatible",
&soc_dev_attr->soc_id);
if (err)
return;
err = of_property_read_string(root, "model", &soc_dev_attr->machine);
if (err)
return;
soc_dev_attr->soc_id = "XCV";
soc_dev_attr->machine = "Integrator/CP";
soc_dev_attr->family = "Integrator";
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
'A' + (intcp_sc_id & 0x0f));
@ -326,8 +317,6 @@ static void __init intcp_init_of(void)
parent = soc_device_to_device(soc_dev);
integrator_init_sysfs(parent, intcp_sc_id);
of_platform_populate(root, of_default_bus_match_table,
intcp_auxdata_lookup, parent);
}
static const char * intcp_dt_board_compat[] = {

1
arch/arm/mach-keystone/Kconfig
View File

@ -1,6 +1,7 @@
config ARCH_KEYSTONE
bool "Texas Instruments Keystone Devices"
depends on ARCH_MULTI_V7
depends on ARM_PATCH_PHYS_VIRT
select ARM_GIC
select HAVE_ARM_ARCH_TIMER
select CLKSRC_MMIO

2
arch/arm/mach-moxart/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_MOXART
menuconfig ARCH_MOXART
bool "MOXA ART SoC" if ARCH_MULTI_V4
select CPU_FA526
select ARM_DMA_MEM_BUFFERABLE

9
arch/arm/mach-mvebu/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_MVEBU
menuconfig ARCH_MVEBU
bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_MMIO
@ -10,15 +10,15 @@ config ARCH_MVEBU
select ZONE_DMA if ARM_LPAE
select ARCH_REQUIRE_GPIOLIB
select PCI_QUIRKS if PCI
select OF_ADDRESS_PCI
if ARCH_MVEBU
menu "Marvell EBU SoC variants"
config MACH_MVEBU_V7
bool
select ARMADA_370_XP_TIMER
select CACHE_L2X0
select ARM_CPU_SUSPEND
config MACH_ARMADA_370
bool "Marvell Armada 370 boards" if ARCH_MULTI_V7
@ -84,7 +84,6 @@ config MACH_DOVE
config MACH_KIRKWOOD
bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select CPU_FEROCEON
select KIRKWOOD_CLK
@ -97,6 +96,4 @@ config MACH_KIRKWOOD
Say 'Y' here if you want your kernel to support boards based
on the Marvell Kirkwood device tree.
endmenu
endif

4
arch/arm/mach-nomadik/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_NOMADIK
menuconfig ARCH_NOMADIK
bool "ST-Ericsson Nomadik"
depends on ARCH_MULTI_V5
select ARCH_REQUIRE_GPIOLIB
@ -15,7 +15,6 @@ config ARCH_NOMADIK
Support for the Nomadik platform by ST-Ericsson
if ARCH_NOMADIK
menu "Nomadik boards"
config MACH_NOMADIK_8815NHK
bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
@ -24,7 +23,6 @@ config MACH_NOMADIK_8815NHK
select I2C_ALGOBIT
select I2C_NOMADIK
endmenu
endif
config NOMADIK_8815

11
arch/arm/mach-omap2/Kconfig
View File

@ -1,3 +1,6 @@
menu "TI OMAP/AM/DM/DRA Family"
depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
config ARCH_OMAP
bool
@ -28,12 +31,11 @@ config ARCH_OMAP4
select ARM_CPU_SUSPEND if PM
select ARM_ERRATA_720789
select ARM_GIC
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select OMAP_INTERCONNECT
select PL310_ERRATA_588369
select PL310_ERRATA_727915
select PL310_ERRATA_588369 if CACHE_L2X0
select PL310_ERRATA_727915 if CACHE_L2X0
select PM_OPP if PM
select PM_RUNTIME if CPU_IDLE
select ARM_ERRATA_754322
@ -80,7 +82,6 @@ config SOC_DRA7XX
config ARCH_OMAP2PLUS
bool
select ARCH_HAS_BANDGAP
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_OMAP
select ARCH_REQUIRE_GPIOLIB
@ -343,3 +344,5 @@ config OMAP4_ERRATA_I688
endmenu
endif
endmenu

7
arch/arm/mach-omap2/common.h
View File

@ -91,7 +91,14 @@ extern void omap3_sync32k_timer_init(void);
extern void omap3_secure_sync32k_timer_init(void);
extern void omap3_gptimer_timer_init(void);
extern void omap4_local_timer_init(void);
#ifdef CONFIG_CACHE_L2X0
int omap_l2_cache_init(void);
#else
static inline int omap_l2_cache_init(void)
{
return 0;
}
#endif
extern void omap5_realtime_timer_init(void);
void omap2420_init_early(void);

6
arch/arm/mach-prima2/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_SIRF
menuconfig ARCH_SIRF
bool "CSR SiRF" if ARCH_MULTI_V7
select ARCH_HAS_RESET_CONTROLLER
select ARCH_REQUIRE_GPIOLIB
@ -11,7 +11,7 @@ config ARCH_SIRF
if ARCH_SIRF
menu "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
comment "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
config ARCH_ATLAS6
bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
@ -37,8 +37,6 @@ config ARCH_MARCO
help
Support for CSR SiRFSoC ARM Cortex A9 Platform
endmenu
config SIRF_IRQ
bool

6
arch/arm/mach-qcom/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_QCOM
menuconfig ARCH_QCOM
bool "Qualcomm Support" if ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select ARM_GIC
@ -11,8 +11,6 @@ config ARCH_QCOM
if ARCH_QCOM
menu "Qualcomm SoC Selection"
config ARCH_MSM8X60
bool "Enable support for MSM8X60"
select CLKSRC_QCOM
@ -25,8 +23,6 @@ config ARCH_MSM8974
bool "Enable support for MSM8974"
select HAVE_ARM_ARCH_TIMER
endmenu
config QCOM_SCM
bool

2
arch/arm/mach-s3c24xx/Kconfig
View File

@ -117,7 +117,7 @@ config S3C24XX_SETUP_TS
Compile in platform device definition for Samsung TouchScreen.
config S3C24XX_DMA
bool "S3C2410 DMA support"
bool "S3C2410 DMA support (deprecated)"
select S3C_DMA
help
S3C2410 DMA support. This is needed for drivers like sound which

4
arch/arm/mach-s3c64xx/Kconfig
View File

@ -18,9 +18,9 @@ config CPU_S3C6410
Enable S3C6410 CPU support
config S3C64XX_PL080
bool "S3C64XX DMA using generic PL08x driver"
def_bool DMADEVICES
select ARM_AMBA
select AMBA_PL08X
select SAMSUNG_DMADEV
config S3C64XX_SETUP_SDHCI
bool

6
arch/arm/mach-s5p64x0/Kconfig
View File

@ -9,16 +9,18 @@ if ARCH_S5P64X0
config CPU_S5P6440
bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
select SAMSUNG_WAKEMASK if PM
help
Enable S5P6440 CPU support
config CPU_S5P6450
bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
select SAMSUNG_WAKEMASK if PM
help
Enable S5P6450 CPU support

3
arch/arm/mach-s5pc100/Kconfig
View File

@ -9,8 +9,9 @@ if ARCH_S5PC100
config CPU_S5PC100
bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_EXT_INT
select SAMSUNG_DMADEV
help
Enable S5PC100 CPU support

3
arch/arm/mach-s5pv210/Kconfig
View File

@ -11,10 +11,11 @@ if ARCH_S5PV210
config CPU_S5PV210
bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_EXT_INT
select S5P_PM if PM
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
help
Enable S5PV210 CPU support

6
arch/arm/mach-shmobile/Kconfig
View File

@ -1,7 +1,7 @@
config ARCH_SHMOBILE
bool
config ARCH_SHMOBILE_MULTI
menuconfig ARCH_SHMOBILE_MULTI
bool "Renesas ARM SoCs" if ARCH_MULTI_V7
depends on MMU
select ARCH_SHMOBILE
@ -15,7 +15,7 @@ config ARCH_SHMOBILE_MULTI
if ARCH_SHMOBILE_MULTI
comment "Renesas ARM SoCs System Type"
#comment "Renesas ARM SoCs System Type"
config ARCH_EMEV2
bool "Emma Mobile EV2"
@ -85,7 +85,6 @@ config ARCH_R8A73A4
select CPU_V7
select SH_CLK_CPG
select RENESAS_IRQC
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select SYS_SUPPORTS_SH_CMT
select SYS_SUPPORTS_SH_TMU
@ -264,7 +263,6 @@ config MACH_KOELSCH
config MACH_KZM9G
bool "KZM-A9-GT board"
depends on ARCH_SH73A0
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR

1
arch/arm/mach-spear/Kconfig
View File

@ -14,7 +14,6 @@ if PLAT_SPEAR
config ARCH_SPEAR13XX
bool "ST SPEAr13xx"
depends on ARCH_MULTI_V7 || PLAT_SPEAR_SINGLE
select ARCH_HAS_CPUFREQ
select ARM_GIC
select GPIO_SPEAR_SPICS
select HAVE_ARM_SCU if SMP

6
arch/arm/mach-sti/Kconfig
View File

@ -1,5 +1,5 @@
menuconfig ARCH_STI
bool "STMicroelectronics Consumer Electronics SOCs with Device Trees" if ARCH_MULTI_V7
bool "STMicroelectronics Consumer Electronics SOCs" if ARCH_MULTI_V7
select ARM_GIC
select ARM_GLOBAL_TIMER
select PINCTRL
@ -11,8 +11,8 @@ menuconfig ARCH_STI
select ARM_ERRATA_754322
select ARM_ERRATA_764369 if SMP
select ARM_ERRATA_775420
select PL310_ERRATA_753970 if CACHE_PL310
select PL310_ERRATA_769419 if CACHE_PL310
select PL310_ERRATA_753970 if CACHE_L2X0
select PL310_ERRATA_769419 if CACHE_L2X0
help
Include support for STiH41x SOCs like STiH415/416 using the device tree
for discovery

8
arch/arm/mach-tegra/Kconfig
View File

@ -1,6 +1,5 @@
config ARCH_TEGRA
menuconfig ARCH_TEGRA
bool "NVIDIA Tegra" if ARCH_MULTI_V7
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
select ARM_GIC
@ -16,8 +15,7 @@ config ARCH_TEGRA
help
This enables support for NVIDIA Tegra based systems.
menu "NVIDIA Tegra options"
depends on ARCH_TEGRA
if ARCH_TEGRA
config ARCH_TEGRA_2x_SOC
bool "Enable support for Tegra20 family"
@ -69,4 +67,4 @@ config TEGRA_AHB
which controls AHB bus master arbitration and some
performance parameters(priority, prefech size).
endmenu
endif

6
arch/arm/mach-u300/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_U300
menuconfig ARCH_U300
bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5
depends on MMU
select ARCH_REQUIRE_GPIOLIB
@ -16,8 +16,6 @@ config ARCH_U300
if ARCH_U300
menu "ST-Ericsson AB U300/U335 Platform"
config MACH_U300
depends on ARCH_U300
bool "U300"
@ -43,6 +41,4 @@ config MACH_U300_SPIDUMMY
you don't need it. Selecting this will activate the
SPI framework and ARM PL022 support.
endmenu
endif

9
arch/arm/mach-ux500/Kconfig
View File

@ -1,9 +1,8 @@
config ARCH_U8500
menuconfig ARCH_U8500
bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7
depends on MMU
select AB8500_CORE
select ABX500_CORE
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
select ARM_ERRATA_754322
@ -16,7 +15,7 @@ config ARCH_U8500
select PINCTRL
select PINCTRL_ABX500
select PINCTRL_NOMADIK
select PL310_ERRATA_753970 if CACHE_PL310
select PL310_ERRATA_753970 if CACHE_L2X0
help
Support for ST-Ericsson's Ux500 architecture
@ -34,8 +33,6 @@ config UX500_SOC_DB8500
select REGULATOR
select REGULATOR_DB8500_PRCMU
menu "Ux500 target platform (boards)"
config MACH_MOP500
bool "U8500 Development platform, MOP500 versions"
select I2C
@ -68,8 +65,6 @@ config UX500_AUTO_PLATFORM
a working kernel. If everything else is disabled, this
automatically enables MACH_MOP500.
endmenu
config UX500_DEBUG_UART
int "Ux500 UART to use for low-level debug"
default 2

10
arch/arm/mach-vexpress/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_VEXPRESS
menuconfig ARCH_VEXPRESS
bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select ARCH_SUPPORTS_BIG_ENDIAN
@ -37,14 +37,13 @@ config ARCH_VEXPRESS
platforms. The traditional (ATAGs) boot method is not usable on
these boards with this option.
menu "Versatile Express platform type"
depends on ARCH_VEXPRESS
if ARCH_VEXPRESS
config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
bool "Enable A5 and A9 only errata work-arounds"
default y
select ARM_ERRATA_720789
select PL310_ERRATA_753970 if CACHE_PL310
select PL310_ERRATA_753970 if CACHE_L2X0
help
Provides common dependencies for Versatile Express platforms
based on Cortex-A5 and Cortex-A9 processors. In order to
@ -65,7 +64,6 @@ config ARCH_VEXPRESS_DCSCB
config ARCH_VEXPRESS_SPC
bool "Versatile Express Serial Power Controller (SPC)"
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select PM_OPP
help
@ -83,4 +81,4 @@ config ARCH_VEXPRESS_TC2_PM
Support for CPU and cluster power management on Versatile Express
with a TC2 (A15x2 A7x3) big.LITTLE core tile.
endmenu
endif

1
arch/arm/mach-vt8500/Kconfig
View File

@ -1,6 +1,5 @@
config ARCH_VT8500
bool
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select VT8500_TIMER

1
arch/arm/mach-zynq/Kconfig
View File

@ -1,6 +1,5 @@
config ARCH_ZYNQ
bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select ARCH_SUPPORTS_BIG_ENDIAN
select ARM_AMBA

9
arch/arm/mm/Kconfig
View File

@ -889,9 +889,10 @@ config CACHE_L2X0
help
This option enables the L2x0 PrimeCell.
if CACHE_L2X0
config CACHE_PL310
bool
depends on CACHE_L2X0
default y if CPU_V7 && !(CPU_V6 || CPU_V6K)
help
This option enables optimisations for the PL310 cache
@ -899,7 +900,6 @@ config CACHE_PL310
config PL310_ERRATA_588369
bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
depends on CACHE_L2X0
help
The PL310 L2 cache controller implements three types of Clean &
Invalidate maintenance operations: by Physical Address
@ -912,7 +912,6 @@ config PL310_ERRATA_588369
config PL310_ERRATA_727915
bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
depends on CACHE_L2X0
help
PL310 implements the Clean & Invalidate by Way L2 cache maintenance
operation (offset 0x7FC). This operation runs in background so that
@ -923,7 +922,6 @@ config PL310_ERRATA_727915
config PL310_ERRATA_753970
bool "PL310 errata: cache sync operation may be faulty"
depends on CACHE_PL310
help
This option enables the workaround for the 753970 PL310 (r3p0) erratum.
@ -938,7 +936,6 @@ config PL310_ERRATA_753970
config PL310_ERRATA_769419
bool "PL310 errata: no automatic Store Buffer drain"
depends on CACHE_L2X0
help
On revisions of the PL310 prior to r3p2, the Store Buffer does
not automatically drain. This can cause normal, non-cacheable
@ -948,6 +945,8 @@ config PL310_ERRATA_769419
on systems with an outer cache, the store buffer is drained
explicitly.
endif
config CACHE_TAUROS2
bool "Enable the Tauros2 L2 cache controller"
depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4)

1
arch/arm/mm/proc-arm925.S
View File

@ -502,6 +502,7 @@ __\name\()_proc_info:
.long \cpu_val
.long \cpu_mask
.long PMD_TYPE_SECT | \
PMD_SECT_CACHEABLE | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ

28
arch/arm/plat-samsung/Kconfig
View File

@ -35,27 +35,15 @@ config SAMSUNG_PM
Base platform power management code for samsung code
if PLAT_SAMSUNG
menu "Samsung Common options"
# boot configurations
comment "Boot options"
config S3C_BOOT_ERROR_RESET
bool "S3C Reboot on decompression error"
help
Say y here to use the watchdog to reset the system if the
kernel decompressor detects an error during decompression.
config S3C_BOOT_UART_FORCE_FIFO
bool "Force UART FIFO on during boot process"
default y
help
Say Y here to force the UART FIFOs on during the kernel
uncompressor
config S3C_LOWLEVEL_UART_PORT
int "S3C UART to use for low-level messages"
depends on ARCH_S3C64XX
default 0
help
Choice of which UART port to use for the low-level messages,
@ -407,17 +395,16 @@ config SAMSUNG_PM_GPIO
Include legacy GPIO power management code for platforms not using
pinctrl-samsung driver.
endif
config SAMSUNG_DMADEV
bool
select ARM_AMBA
bool "Use legacy Samsung DMA abstraction"
depends on CPU_S5PV210 || CPU_S5PC100 || ARCH_S5P64X0 || ARCH_S3C64XX
select DMADEVICES
select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \
CPU_S5P6450 || CPU_S5P6440)
default y
help
Use DMA device engine for PL330 DMAC.
endif
config S5P_DEV_MFC
bool
help
@ -503,4 +490,5 @@ config DEBUG_S3C_UART
default "2" if DEBUG_S3C_UART2
default "3" if DEBUG_S3C_UART3
endmenu
endif

3
arch/arm64/Kconfig
View File

@ -1,8 +1,9 @@
config ARM64
def_bool y
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select ARCH_USE_CMPXCHG_LOCKREF
select ARCH_HAS_OPP
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_USE_CMPXCHG_LOCKREF
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
select ARCH_WANT_FRAME_POINTERS

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