arm: plat-orion: use void __iomem pointers for addr-map functions

The functions for address mapping management now take void __iomem
pointers, so we remove the temporary "unsigned long" casts from the
mach-*/common.c files.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Thomas Petazzoni 2012-09-11 14:27:26 +02:00 committed by Jason Cooper
parent e96a0309f8
commit 9b7b7d8b02
6 changed files with 15 additions and 16 deletions

View File

@ -47,7 +47,7 @@ static inline void __iomem *ddr_map_sc(int i)
static struct __initdata orion_addr_map_cfg addr_map_cfg = {
.num_wins = 8,
.remappable_wins = 4,
.bridge_virt_base = (unsigned long) BRIDGE_VIRT_BASE,
.bridge_virt_base = BRIDGE_VIRT_BASE,
};
static const struct __initdata orion_addr_map_info addr_map_info[] = {

View File

@ -41,7 +41,7 @@
static struct __initdata orion_addr_map_cfg addr_map_cfg = {
.num_wins = 8,
.remappable_wins = 4,
.bridge_virt_base = (unsigned long) BRIDGE_VIRT_BASE,
.bridge_virt_base = BRIDGE_VIRT_BASE,
};
static const struct __initdata orion_addr_map_info addr_map_info[] = {
@ -86,5 +86,6 @@ void __init kirkwood_setup_cpu_mbus(void)
/*
* Setup MBUS dram target info.
*/
orion_setup_cpu_mbus_target(&addr_map_cfg, DDR_WINDOW_CPU_BASE);
orion_setup_cpu_mbus_target(&addr_map_cfg,
(void __iomem *) DDR_WINDOW_CPU_BASE);
}

View File

@ -71,10 +71,10 @@ void __init mv78xx0_setup_cpu_mbus(void)
*/
if (mv78xx0_core_index() == 0)
orion_setup_cpu_mbus_target(&addr_map_cfg,
DDR_WINDOW_CPU0_BASE);
(void __iomem *) DDR_WINDOW_CPU0_BASE);
else
orion_setup_cpu_mbus_target(&addr_map_cfg,
DDR_WINDOW_CPU1_BASE);
(void __iomem *) DDR_WINDOW_CPU1_BASE);
}
void __init mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,

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@ -79,7 +79,7 @@ static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
static struct orion_addr_map_cfg addr_map_cfg __initdata = {
.num_wins = 8,
.cpu_win_can_remap = cpu_win_can_remap,
.bridge_virt_base = (unsigned long) ORION5X_BRIDGE_VIRT_BASE,
.bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,
};
static const struct __initdata orion_addr_map_info addr_map_info[] = {
@ -113,7 +113,8 @@ void __init orion5x_setup_cpu_mbus_bridge(void)
/*
* Setup MBUS dram target info.
*/
orion_setup_cpu_mbus_target(&addr_map_cfg, ORION5X_DDR_WINDOW_CPU_BASE);
orion_setup_cpu_mbus_target(&addr_map_cfg,
(void __iomem *) ORION5X_DDR_WINDOW_CPU_BASE);
}
void __init orion5x_setup_dev_boot_win(u32 base, u32 size)

View File

@ -48,7 +48,7 @@ EXPORT_SYMBOL_GPL(mv_mbus_dram_info);
static void __init __iomem *
orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
{
return (void __iomem *)(cfg->bridge_virt_base + (win << 4));
return cfg->bridge_virt_base + (win << 4);
}
/*
@ -143,19 +143,16 @@ void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
* Setup MBUS dram target info.
*/
void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
const u32 ddr_window_cpu_base)
const void __iomem *ddr_window_cpu_base)
{
void __iomem *addr;
int i;
int cs;
orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
addr = (void __iomem *)ddr_window_cpu_base;
for (i = 0, cs = 0; i < 4; i++) {
u32 base = readl(addr + DDR_BASE_CS_OFF(i));
u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
u32 base = readl(ddr_window_cpu_base + DDR_BASE_CS_OFF(i));
u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
/*
* Chip select enabled?

View File

@ -16,7 +16,7 @@ extern struct mbus_dram_target_info orion_mbus_dram_info;
struct orion_addr_map_cfg {
const int num_wins; /* Total number of windows */
const int remappable_wins;
const u32 bridge_virt_base;
void __iomem * const bridge_virt_base;
/* If NULL, the default cpu_win_can_remap will be used, using
the value in remappable_wins */
@ -49,5 +49,5 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
const u8 attr, const int remap);
void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
const u32 ddr_window_cpu_base);
const void __iomem *ddr_window_cpu_base);
#endif