forked from Minki/linux
Hexagon: Add processor and system headers
Signed-off-by: Richard Kuo <rkuo@codeaurora.org> Signed-off-by: Linas Vepstas <linas@codeaurora.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Richard Kuo
Linus Torvalds
parent
b9398a8459
commit
99a70aa051
1
arch/hexagon/include/asm/asm-offsets.h
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1
arch/hexagon/include/asm/asm-offsets.h
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@ -0,0 +1 @@
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#include <generated/asm-offsets.h>
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62
arch/hexagon/include/asm/irqflags.h
Normal file
62
arch/hexagon/include/asm/irqflags.h
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@ -0,0 +1,62 @@
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/*
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* IRQ support for the Hexagon architecture
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*
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* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#ifndef _ASM_IRQFLAGS_H
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#define _ASM_IRQFLAGS_H
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#include <asm/hexagon_vm.h>
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#include <linux/types.h>
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static inline unsigned long arch_local_save_flags(void)
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{
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return __vmgetie();
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}
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static inline unsigned long arch_local_irq_save(void)
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{
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return __vmsetie(VM_INT_DISABLE);
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}
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static inline bool arch_irqs_disabled_flags(unsigned long flags)
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{
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return !flags;
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}
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static inline bool arch_irqs_disabled(void)
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{
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return !__vmgetie();
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}
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static inline void arch_local_irq_enable(void)
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{
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__vmsetie(VM_INT_ENABLE);
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}
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static inline void arch_local_irq_disable(void)
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{
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__vmsetie(VM_INT_DISABLE);
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}
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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__vmsetie(flags);
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}
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#endif
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123
arch/hexagon/include/asm/processor.h
Normal file
123
arch/hexagon/include/asm/processor.h
Normal file
@ -0,0 +1,123 @@
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/*
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* Process/processor support for the Hexagon architecture
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*
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* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#ifndef _ASM_PROCESSOR_H
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#define _ASM_PROCESSOR_H
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#ifndef __ASSEMBLY__
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#include <asm/mem-layout.h>
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#include <asm/registers.h>
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#include <asm/hexagon_vm.h>
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/* must be a macro */
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#define current_text_addr() ({ __label__ _l; _l: &&_l; })
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/* task_struct, defined elsewhere, is the "process descriptor" */
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struct task_struct;
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/* this is defined in arch/process.c */
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extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
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extern unsigned long thread_saved_pc(struct task_struct *tsk);
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extern void start_thread(struct pt_regs *, unsigned long, unsigned long);
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/*
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* thread_struct is supposed to be for context switch data.
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* Specifically, to hold the state necessary to perform switch_to...
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*/
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struct thread_struct {
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void *switch_sp;
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};
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/*
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* initializes thread_struct
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* The only thing we have in there is switch_sp
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* which doesn't really need to be initialized.
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*/
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#define INIT_THREAD { \
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}
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#define cpu_relax() __vmyield()
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/*
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* "Unlazying all lazy status" occurs here.
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*/
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static inline void prepare_to_copy(struct task_struct *tsk)
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{
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}
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/*
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* Decides where the kernel will search for a free chunk of vm space during
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* mmaps.
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* See also arch_get_unmapped_area.
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* Doesn't affect if you have MAX_FIXED in the page flags set though...
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*
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* Apparently the convention is that ld.so will ask for "unmapped" private
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* memory to be allocated SOMEWHERE, but it also asks for memory explicitly
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* via MAP_FIXED at the lower * addresses starting at VA=0x0.
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*
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* If the two requests collide, you get authentic segfaulting action, so
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* you have to kick the "unmapped" base requests higher up.
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*/
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#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE/3))
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#define task_pt_regs(task) \
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((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE) - 1)
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#define KSTK_EIP(tsk) (pt_elr(task_pt_regs(tsk)))
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#define KSTK_ESP(tsk) (pt_psp(task_pt_regs(tsk)))
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/* Free all resources held by a thread; defined in process.c */
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extern void release_thread(struct task_struct *dead_task);
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/* Get wait channel for task P. */
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extern unsigned long get_wchan(struct task_struct *p);
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/* The following stuff is pretty HEXAGON specific. */
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/* This is really just here for __switch_to.
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Offsets are pulled via asm-offsets.c */
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/*
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* No real reason why VM and native switch stacks should be different.
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* Ultimately this should merge. Note that Rev C. ABI called out only
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* R24-27 as callee saved GPRs needing explicit attention (R29-31 being
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* dealt with automagically by allocframe), but the current ABI has
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* more, R16-R27. By saving more, the worst case is that we waste some
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* cycles if building with the old compilers.
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*/
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struct hexagon_switch_stack {
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unsigned long long r1716;
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unsigned long long r1918;
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unsigned long long r2120;
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unsigned long long r2322;
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unsigned long long r2524;
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unsigned long long r2726;
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unsigned long fp;
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unsigned long lr;
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};
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#endif /* !__ASSEMBLY__ */
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#endif
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236
arch/hexagon/include/asm/registers.h
Normal file
236
arch/hexagon/include/asm/registers.h
Normal file
@ -0,0 +1,236 @@
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/*
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* Register definitions for the Hexagon architecture
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*
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* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
|
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#ifndef _ASM_REGISTERS_H
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#define _ASM_REGISTERS_H
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#define SP r29
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#ifndef __ASSEMBLY__
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/* See kernel/entry.S for further documentation. */
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/*
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* Entry code copies the event record out of guest registers into
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* this structure (which is on the stack).
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*/
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struct hvm_event_record {
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unsigned long vmel; /* Event Linkage (return address) */
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unsigned long vmest; /* Event context - pre-event SSR values */
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unsigned long vmpsp; /* Previous stack pointer */
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unsigned long vmbadva; /* Bad virtual address for addressing events */
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};
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struct pt_regs {
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long restart_r0; /* R0 checkpoint for syscall restart */
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long syscall_nr; /* Only used in system calls */
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union {
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struct {
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unsigned long usr;
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unsigned long preds;
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};
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long long int predsusr;
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};
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union {
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struct {
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unsigned long m0;
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unsigned long m1;
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};
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long long int m1m0;
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};
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union {
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struct {
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unsigned long sa1;
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unsigned long lc1;
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};
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long long int lc1sa1;
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};
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union {
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struct {
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unsigned long sa0;
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unsigned long lc0;
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};
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long long int lc0sa0;
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};
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union {
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struct {
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unsigned long gp;
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unsigned long ugp;
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};
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long long int ugpgp;
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};
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/*
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* Be extremely careful with rearranging these, if at all. Some code
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* assumes the 32 registers exist exactly like this in memory;
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* e.g. kernel/ptrace.c
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* e.g. kernel/signal.c (restore_sigcontext)
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*/
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union {
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struct {
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unsigned long r00;
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unsigned long r01;
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};
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long long int r0100;
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};
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union {
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struct {
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unsigned long r02;
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unsigned long r03;
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};
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long long int r0302;
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};
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union {
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struct {
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unsigned long r04;
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unsigned long r05;
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};
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long long int r0504;
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};
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union {
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struct {
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unsigned long r06;
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unsigned long r07;
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};
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long long int r0706;
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};
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union {
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struct {
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unsigned long r08;
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unsigned long r09;
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};
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long long int r0908;
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};
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union {
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struct {
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unsigned long r10;
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unsigned long r11;
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};
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long long int r1110;
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};
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union {
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struct {
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unsigned long r12;
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unsigned long r13;
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};
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long long int r1312;
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};
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union {
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struct {
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unsigned long r14;
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unsigned long r15;
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};
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long long int r1514;
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};
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union {
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struct {
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unsigned long r16;
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unsigned long r17;
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};
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long long int r1716;
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};
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union {
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struct {
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unsigned long r18;
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unsigned long r19;
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};
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long long int r1918;
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};
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union {
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struct {
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unsigned long r20;
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unsigned long r21;
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};
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long long int r2120;
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};
|
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union {
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struct {
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unsigned long r22;
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unsigned long r23;
|
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};
|
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long long int r2322;
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};
|
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union {
|
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struct {
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unsigned long r24;
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unsigned long r25;
|
||||
};
|
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long long int r2524;
|
||||
};
|
||||
union {
|
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struct {
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||||
unsigned long r26;
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unsigned long r27;
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};
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long long int r2726;
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||||
};
|
||||
union {
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struct {
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||||
unsigned long r28;
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unsigned long r29;
|
||||
};
|
||||
long long int r2928;
|
||||
};
|
||||
union {
|
||||
struct {
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||||
unsigned long r30;
|
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unsigned long r31;
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};
|
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long long int r3130;
|
||||
};
|
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/* VM dispatch pushes event record onto stack - we can build on it */
|
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struct hvm_event_record hvmer;
|
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};
|
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|
||||
/* Defines to conveniently access the values */
|
||||
|
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/*
|
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* As of the VM spec 0.5, these registers are now set/retrieved via a
|
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* VM call. On the in-bound side, we just fetch the values
|
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* at the entry points and stuff them into the old record in pt_regs.
|
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* However, on the outbound side, probably at VM rte, we set the
|
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* registers back.
|
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*/
|
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|
||||
#define pt_elr(regs) ((regs)->hvmer.vmel)
|
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#define pt_set_elr(regs, val) ((regs)->hvmer.vmel = (val))
|
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#define pt_cause(regs) ((regs)->hvmer.vmest & (HVM_VMEST_CAUSE_MSK))
|
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#define user_mode(regs) \
|
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(((regs)->hvmer.vmest & (HVM_VMEST_UM_MSK << HVM_VMEST_UM_SFT)) != 0)
|
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#define ints_enabled(regs) \
|
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(((regs)->hvmer.vmest & (HVM_VMEST_IE_MSK << HVM_VMEST_IE_SFT)) != 0)
|
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#define pt_psp(regs) ((regs)->hvmer.vmpsp)
|
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#define pt_badva(regs) ((regs)->hvmer.vmbadva)
|
||||
|
||||
#define pt_set_rte_sp(regs, sp) do {\
|
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pt_psp(regs) = (sp);\
|
||||
(regs)->SP = (unsigned long) &((regs)->hvmer);\
|
||||
} while (0)
|
||||
|
||||
#define pt_set_kmode(regs) \
|
||||
(regs)->hvmer.vmest = (HVM_VMEST_IE_MSK << HVM_VMEST_IE_SFT)
|
||||
|
||||
#define pt_set_usermode(regs) \
|
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(regs)->hvmer.vmest = (HVM_VMEST_UM_MSK << HVM_VMEST_UM_SFT) \
|
||||
| (HVM_VMEST_IE_MSK << HVM_VMEST_IE_SFT)
|
||||
|
||||
#endif /* ifndef __ASSEMBLY */
|
||||
|
||||
#endif
|
||||
126
arch/hexagon/include/asm/system.h
Normal file
126
arch/hexagon/include/asm/system.h
Normal file
@ -0,0 +1,126 @@
|
||||
/*
|
||||
* System level definitions for the Hexagon architecture
|
||||
*
|
||||
* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
|
||||
* 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef _ASM_SYSTEM_H
|
||||
#define _ASM_SYSTEM_H
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/irqflags.h>
|
||||
#include <asm/atomic.h>
|
||||
#include <asm/hexagon_vm.h>
|
||||
|
||||
struct thread_struct;
|
||||
|
||||
extern struct task_struct *__switch_to(struct task_struct *,
|
||||
struct task_struct *,
|
||||
struct task_struct *);
|
||||
|
||||
#define switch_to(p, n, r) do {\
|
||||
r = __switch_to((p), (n), (r));\
|
||||
} while (0)
|
||||
|
||||
|
||||
#define rmb() barrier()
|
||||
#define read_barrier_depends() barrier()
|
||||
#define wmb() barrier()
|
||||
#define mb() barrier()
|
||||
#define smp_rmb() barrier()
|
||||
#define smp_read_barrier_depends() barrier()
|
||||
#define smp_wmb() barrier()
|
||||
#define smp_mb() barrier()
|
||||
#define smp_mb__before_atomic_dec() barrier()
|
||||
#define smp_mb__after_atomic_dec() barrier()
|
||||
#define smp_mb__before_atomic_inc() barrier()
|
||||
#define smp_mb__after_atomic_inc() barrier()
|
||||
|
||||
/*
|
||||
* __xchg - atomically exchange a register and a memory location
|
||||
* @x: value to swap
|
||||
* @ptr: pointer to memory
|
||||
* @size: size of the value
|
||||
*
|
||||
* Only 4 bytes supported currently.
|
||||
*
|
||||
* Note: there was an errata for V2 about .new's and memw_locked.
|
||||
*
|
||||
*/
|
||||
static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
|
||||
int size)
|
||||
{
|
||||
unsigned long retval;
|
||||
|
||||
/* Can't seem to use printk or panic here, so just stop */
|
||||
if (size != 4) do { asm volatile("brkpt;\n"); } while (1);
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"1: %0 = memw_locked(%1);\n" /* load into retval */
|
||||
" memw_locked(%1,P0) = %2;\n" /* store into memory */
|
||||
" if !P0 jump 1b;\n"
|
||||
: "=&r" (retval)
|
||||
: "r" (ptr), "r" (x)
|
||||
: "memory", "p0"
|
||||
);
|
||||
return retval;
|
||||
}
|
||||
|
||||
/*
|
||||
* Atomically swap the contents of a register with memory. Should be atomic
|
||||
* between multiple CPU's and within interrupts on the same CPU.
|
||||
*/
|
||||
#define xchg(ptr, v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), \
|
||||
sizeof(*(ptr))))
|
||||
|
||||
/* Set a value and use a memory barrier. Used by the scheduler somewhere. */
|
||||
#define set_mb(var, value) \
|
||||
do { var = value; mb(); } while (0)
|
||||
|
||||
/*
|
||||
* see rt-mutex-design.txt; cmpxchg supposedly checks if *ptr == A and swaps.
|
||||
* looks just like atomic_cmpxchg on our arch currently with a bunch of
|
||||
* variable casting.
|
||||
*/
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
#define cmpxchg(ptr, old, new) \
|
||||
({ \
|
||||
__typeof__(ptr) __ptr = (ptr); \
|
||||
__typeof__(*(ptr)) __old = (old); \
|
||||
__typeof__(*(ptr)) __new = (new); \
|
||||
__typeof__(*(ptr)) __oldval = 0; \
|
||||
\
|
||||
asm volatile( \
|
||||
"1: %0 = memw_locked(%1);\n" \
|
||||
" { P0 = cmp.eq(%0,%2);\n" \
|
||||
" if (!P0.new) jump:nt 2f; }\n" \
|
||||
" memw_locked(%1,p0) = %3;\n" \
|
||||
" if (!P0) jump 1b;\n" \
|
||||
"2:\n" \
|
||||
: "=&r" (__oldval) \
|
||||
: "r" (__ptr), "r" (__old), "r" (__new) \
|
||||
: "memory", "p0" \
|
||||
); \
|
||||
__oldval; \
|
||||
})
|
||||
|
||||
/* Should probably shoot for an 8-byte aligned stack pointer */
|
||||
#define STACK_MASK (~7)
|
||||
#define arch_align_stack(x) (x & STACK_MASK)
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user