forked from Minki/linux
m68knommu: clean up ColdFire 528x interrupt setup
With the common intc-2 interrupt controller code in place the ColdFire 528x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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1b718c71b7
commit
980f9235eb
@ -3,8 +3,8 @@
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/*
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* linux/arch/m68knommu/platform/528x/config.c
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*
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* Sub-architcture dependant initialization code for the Motorola
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* 5280 and 5282 CPUs.
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* Sub-architcture dependant initialization code for the Freescale
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* 5280, 5281 and 5282 CPUs.
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*
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* Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
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@ -15,20 +15,13 @@
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfuart.h>
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#ifdef CONFIG_MTD_PARTITIONS
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#include <linux/mtd/partitions.h>
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#endif
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/***************************************************************************/
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static struct mcf_platform_uart m528x_uart_platform[] = {
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@ -91,23 +84,13 @@ static struct platform_device *m528x_devices[] __initdata = {
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/***************************************************************************/
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#define INTC0 (MCF_MBAR + MCFICM_INTC0)
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static void __init m528x_uart_init_line(int line, int irq)
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{
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u8 port;
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u32 imr;
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if ((line < 0) || (line > 2))
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return;
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/* level 6, line based priority */
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writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
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imr = readl(INTC0 + MCFINTC_IMRL);
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imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
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writel(imr, INTC0 + MCFINTC_IMRL);
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/* make sure PUAPAR is set for UART0 and UART1 */
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if (line < 2) {
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port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR);
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@ -129,21 +112,8 @@ static void __init m528x_uarts_init(void)
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static void __init m528x_fec_init(void)
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{
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u32 imr;
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u16 v16;
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/* Unmask FEC interrupts at ColdFire interrupt controller */
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writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
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writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
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writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
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imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
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imr &= ~0xf;
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writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
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imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
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imr &= ~0xff800001;
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writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
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/* Set multi-function pins to ethernet mode for fec0 */
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v16 = readw(MCF_IPSBAR + 0x100056);
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writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
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@ -152,21 +122,6 @@ static void __init m528x_fec_init(void)
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/***************************************************************************/
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void mcf_disableall(void)
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{
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*((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
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*((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
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}
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/***************************************************************************/
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void mcf_autovector(unsigned int vec)
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{
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/* Everything is auto-vectored on the 5272 */
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}
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/***************************************************************************/
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static void m528x_cpu_reset(void)
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{
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local_irq_disable();
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@ -204,8 +159,6 @@ void wildfiremod_halt(void)
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void __init config_BSP(char *commandp, int size)
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{
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mcf_disableall();
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#ifdef CONFIG_WILDFIRE
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mach_halt = wildfire_halt;
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#endif
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