mmc: tmio: name 0xd8 as CTL_DMA_ENABLE
This reflects at least the current usage of this register and I think it improves the readability of the code ever so slightly. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Chris Ball <cjb@laptop.org>
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@ -26,7 +26,7 @@ static void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
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{
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{
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#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE)
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#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE)
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/* Switch DMA mode on or off - SuperH specific? */
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/* Switch DMA mode on or off - SuperH specific? */
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writew(enable ? 2 : 0, host->ctl + (0xd8 << host->bus_shift));
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writew(enable ? 2 : 0, host->ctl + (CTL_DMA_ENABLE << host->bus_shift));
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#endif
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#endif
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}
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}
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@ -30,6 +30,7 @@
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#define CTL_TRANSACTION_CTL 0x34
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#define CTL_TRANSACTION_CTL 0x34
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#define CTL_SDIO_STATUS 0x36
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#define CTL_SDIO_STATUS 0x36
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#define CTL_SDIO_IRQ_MASK 0x38
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#define CTL_SDIO_IRQ_MASK 0x38
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#define CTL_DMA_ENABLE 0xd8
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#define CTL_RESET_SD 0xe0
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#define CTL_RESET_SD 0xe0
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#define CTL_SDIO_REGS 0x100
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#define CTL_SDIO_REGS 0x100
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#define CTL_CLK_AND_WAIT_CTL 0x138
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#define CTL_CLK_AND_WAIT_CTL 0x138
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