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KVM: allow access to EFER in 32bit KVM

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This patch makes the EFER register accessible on a 32bit KVM host. This is
necessary to boot 32 bit PAE guests under SVM.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
This commit is contained in:
Joerg Roedel 2008-01-31 14:57:40 +01:00 committed by Avi Kivity
parent 9f62e19a11
commit 9457a712a2
1 changed files with 0 additions and 10 deletions
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10
arch/x86/kvm/x86.c
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@ -432,8 +432,6 @@ static u32 emulated_msrs[] = {
MSR_IA32_MISC_ENABLE, MSR_IA32_MISC_ENABLE,
}; };
#ifdef CONFIG_X86_64
static void set_efer(struct kvm_vcpu *vcpu, u64 efer) static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
{ {
if (efer & efer_reserved_bits) { if (efer & efer_reserved_bits) {
@ -458,8 +456,6 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
vcpu->arch.shadow_efer = efer; vcpu->arch.shadow_efer = efer;
} }
#endif
void kvm_enable_efer_bits(u64 mask) void kvm_enable_efer_bits(u64 mask)
{ {
efer_reserved_bits &= ~mask; efer_reserved_bits &= ~mask;
@ -489,11 +485,9 @@ static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
{ {
switch (msr) { switch (msr) {
#ifdef CONFIG_X86_64
case MSR_EFER: case MSR_EFER:
set_efer(vcpu, data); set_efer(vcpu, data);
break; break;
#endif
case MSR_IA32_MC0_STATUS: case MSR_IA32_MC0_STATUS:
pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n", pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
__FUNCTION__, data); __FUNCTION__, data);
@ -571,11 +565,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
case MSR_IA32_MISC_ENABLE: case MSR_IA32_MISC_ENABLE:
data = vcpu->arch.ia32_misc_enable_msr; data = vcpu->arch.ia32_misc_enable_msr;
break; break;
#ifdef CONFIG_X86_64
case MSR_EFER: case MSR_EFER:
data = vcpu->arch.shadow_efer; data = vcpu->arch.shadow_efer;
break; break;
#endif
default: default:
pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr); pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
return 1; return 1;
@ -2880,9 +2872,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
set_cr8(vcpu, sregs->cr8); set_cr8(vcpu, sregs->cr8);
mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer; mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
#ifdef CONFIG_X86_64
kvm_x86_ops->set_efer(vcpu, sregs->efer); kvm_x86_ops->set_efer(vcpu, sregs->efer);
#endif
kvm_set_apic_base(vcpu, sregs->apic_base); kvm_set_apic_base(vcpu, sregs->apic_base);
kvm_x86_ops->decache_cr4_guest_bits(vcpu); kvm_x86_ops->decache_cr4_guest_bits(vcpu);