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qlge: bugfix: Fix register access error checking.

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Some indexed registers do not have error bits. In these cases a
value of zero should be used for error checking.

Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ron Mercer 2009-01-04 17:08:29 -08:00 committed by David S. Miller
parent 459caf5a99
commit 939678f81a
1 changed files with 12 additions and 12 deletions
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24
drivers/net/qlge/qlge_main.c
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@ -257,7 +257,7 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
{ {
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MW, 0);
if (status) if (status)
goto exit; goto exit;
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@ -265,13 +265,13 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MR, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MR, 0);
if (status) if (status)
goto exit; goto exit;
*value++ = ql_read32(qdev, MAC_ADDR_DATA); *value++ = ql_read32(qdev, MAC_ADDR_DATA);
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MW, 0);
if (status) if (status)
goto exit; goto exit;
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@ -279,14 +279,14 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MR, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MR, 0);
if (status) if (status)
goto exit; goto exit;
*value++ = ql_read32(qdev, MAC_ADDR_DATA); *value++ = ql_read32(qdev, MAC_ADDR_DATA);
if (type == MAC_ADDR_TYPE_CAM_MAC) { if (type == MAC_ADDR_TYPE_CAM_MAC) {
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MW, 0);
if (status) if (status)
goto exit; goto exit;
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@ -294,7 +294,7 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
status = status =
ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, ql_wait_reg_rdy(qdev, MAC_ADDR_IDX,
MAC_ADDR_MR, MAC_ADDR_E); MAC_ADDR_MR, 0);
if (status) if (status)
goto exit; goto exit;
*value++ = ql_read32(qdev, MAC_ADDR_DATA); *value++ = ql_read32(qdev, MAC_ADDR_DATA);
@ -344,7 +344,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MW, 0);
if (status) if (status)
goto exit; goto exit;
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@ -353,7 +353,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
ql_write32(qdev, MAC_ADDR_DATA, lower); ql_write32(qdev, MAC_ADDR_DATA, lower);
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MW, 0);
if (status) if (status)
goto exit; goto exit;
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@ -362,7 +362,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
ql_write32(qdev, MAC_ADDR_DATA, upper); ql_write32(qdev, MAC_ADDR_DATA, upper);
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MW, 0);
if (status) if (status)
goto exit; goto exit;
ql_write32(qdev, MAC_ADDR_IDX, (offset) | /* offset */ ql_write32(qdev, MAC_ADDR_IDX, (offset) | /* offset */
@ -400,7 +400,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
status = status =
ql_wait_reg_rdy(qdev, ql_wait_reg_rdy(qdev,
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); MAC_ADDR_IDX, MAC_ADDR_MW, 0);
if (status) if (status)
goto exit; goto exit;
ql_write32(qdev, MAC_ADDR_IDX, offset | /* offset */ ql_write32(qdev, MAC_ADDR_IDX, offset | /* offset */
@ -431,13 +431,13 @@ int ql_get_routing_reg(struct ql_adapter *qdev, u32 index, u32 *value)
if (status) if (status)
goto exit; goto exit;
status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, RT_IDX_E); status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, 0);
if (status) if (status)
goto exit; goto exit;
ql_write32(qdev, RT_IDX, ql_write32(qdev, RT_IDX,
RT_IDX_TYPE_NICQ | RT_IDX_RS | (index << RT_IDX_IDX_SHIFT)); RT_IDX_TYPE_NICQ | RT_IDX_RS | (index << RT_IDX_IDX_SHIFT));
status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, RT_IDX_E); status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, 0);
if (status) if (status)
goto exit; goto exit;
*value = ql_read32(qdev, RT_DATA); *value = ql_read32(qdev, RT_DATA);