KVM: x86: Unconditionally call x86 ops that are always implemented
Remove a few stale checks for non-NULL ops now that the ops in question are implemented by both VMX and SVM. Note, this is **not** stable material, the Fixes tags are there purely to show when a particular op was first supported by both VMX and SVM. Fixes:74f169090b
("kvm/svm: Setup MCG_CAP on AMD properly") Fixes:b31c114b82
("KVM: X86: Provide a capability to disable PAUSE intercepts") Fixes:411b44ba80
("svm: Implements update_pi_irte hook to setup posted interrupt") Cc: Krish Sadhukhan <krish.sadhukhan@oracle.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -3513,8 +3513,7 @@ static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
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for (bank = 0; bank < bank_num; bank++)
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vcpu->arch.mce_banks[bank*4] = ~(u64)0;
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if (kvm_x86_ops->setup_mce)
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kvm_x86_ops->setup_mce(vcpu);
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kvm_x86_ops->setup_mce(vcpu);
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out:
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return r;
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}
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@ -9330,10 +9329,7 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
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kvm_page_track_init(kvm);
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kvm_mmu_init_vm(kvm);
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if (kvm_x86_ops->vm_init)
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return kvm_x86_ops->vm_init(kvm);
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return 0;
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return kvm_x86_ops->vm_init(kvm);
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}
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static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
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@ -10025,7 +10021,7 @@ EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
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bool kvm_arch_has_irq_bypass(void)
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{
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return kvm_x86_ops->update_pi_irte != NULL;
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return true;
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}
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int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
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@ -10065,9 +10061,6 @@ void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
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int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
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uint32_t guest_irq, bool set)
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{
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if (!kvm_x86_ops->update_pi_irte)
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return -EINVAL;
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return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
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}
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