net: aquantia: add infrastructure to readout chip temperature
Ability to read the chip temperature from memory via hwmon interface Signed-off-by: Yana Esina <yana.esina@aquantia.com> Signed-off-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -259,6 +259,8 @@ struct aq_fw_ops {
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int (*update_stats)(struct aq_hw_s *self);
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int (*update_stats)(struct aq_hw_s *self);
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int (*get_phy_temp)(struct aq_hw_s *self, int *temp);
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u32 (*get_flow_control)(struct aq_hw_s *self, u32 *fcmode);
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u32 (*get_flow_control)(struct aq_hw_s *self, u32 *fcmode);
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int (*set_flow_control)(struct aq_hw_s *self);
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int (*set_flow_control)(struct aq_hw_s *self);
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@ -960,6 +960,7 @@ const struct aq_fw_ops aq_fw_1x_ops = {
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.set_state = hw_atl_utils_mpi_set_state,
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.set_state = hw_atl_utils_mpi_set_state,
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.update_link_status = hw_atl_utils_mpi_get_link_status,
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.update_link_status = hw_atl_utils_mpi_get_link_status,
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.update_stats = hw_atl_utils_update_stats,
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.update_stats = hw_atl_utils_update_stats,
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.get_phy_temp = NULL,
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.set_power = aq_fw1x_set_power,
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.set_power = aq_fw1x_set_power,
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.set_eee_rate = NULL,
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.set_eee_rate = NULL,
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.get_eee_rate = NULL,
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.get_eee_rate = NULL,
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@ -38,6 +38,7 @@
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#define HW_ATL_FW2X_CTRL_WOL BIT(CTRL_WOL)
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#define HW_ATL_FW2X_CTRL_WOL BIT(CTRL_WOL)
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#define HW_ATL_FW2X_CTRL_LINK_DROP BIT(CTRL_LINK_DROP)
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#define HW_ATL_FW2X_CTRL_LINK_DROP BIT(CTRL_LINK_DROP)
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#define HW_ATL_FW2X_CTRL_PAUSE BIT(CTRL_PAUSE)
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#define HW_ATL_FW2X_CTRL_PAUSE BIT(CTRL_PAUSE)
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#define HW_ATL_FW2X_CTRL_TEMPERATURE BIT(CTRL_TEMPERATURE)
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#define HW_ATL_FW2X_CTRL_ASYMMETRIC_PAUSE BIT(CTRL_ASYMMETRIC_PAUSE)
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#define HW_ATL_FW2X_CTRL_ASYMMETRIC_PAUSE BIT(CTRL_ASYMMETRIC_PAUSE)
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#define HW_ATL_FW2X_CTRL_FORCE_RECONNECT BIT(CTRL_FORCE_RECONNECT)
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#define HW_ATL_FW2X_CTRL_FORCE_RECONNECT BIT(CTRL_FORCE_RECONNECT)
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@ -310,6 +311,40 @@ static int aq_fw2x_update_stats(struct aq_hw_s *self)
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return hw_atl_utils_update_stats(self);
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return hw_atl_utils_update_stats(self);
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}
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}
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static int aq_fw2x_get_phy_temp(struct aq_hw_s *self, int *temp)
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{
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u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);
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u32 temp_val = mpi_opts & HW_ATL_FW2X_CTRL_TEMPERATURE;
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u32 phy_temp_offset;
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u32 temp_res;
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int err = 0;
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u32 val;
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phy_temp_offset = self->mbox_addr +
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offsetof(struct hw_atl_utils_mbox, info) +
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offsetof(struct hw_aq_info, phy_temperature);
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/* Toggle statistics bit for FW to 0x36C.18 (CTRL_TEMPERATURE) */
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mpi_opts = mpi_opts ^ HW_ATL_FW2X_CTRL_TEMPERATURE;
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aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);
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/* Wait FW to report back */
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err = readx_poll_timeout_atomic(aq_fw2x_state2_get, self, val,
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temp_val !=
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(val & HW_ATL_FW2X_CTRL_TEMPERATURE),
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1U, 10000U);
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err = hw_atl_utils_fw_downld_dwords(self, phy_temp_offset,
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&temp_res, 1);
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if (err)
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return err;
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/* Convert PHY temperature from 1/256 degree Celsius
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* to 1/1000 degree Celsius.
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*/
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*temp = temp_res * 1000 / 256;
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return 0;
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}
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static int aq_fw2x_set_sleep_proxy(struct aq_hw_s *self, u8 *mac)
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static int aq_fw2x_set_sleep_proxy(struct aq_hw_s *self, u8 *mac)
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{
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{
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struct hw_atl_utils_fw_rpc *rpc = NULL;
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struct hw_atl_utils_fw_rpc *rpc = NULL;
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@ -509,6 +544,7 @@ const struct aq_fw_ops aq_fw_2x_ops = {
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.set_state = aq_fw2x_set_state,
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.set_state = aq_fw2x_set_state,
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.update_link_status = aq_fw2x_update_link_status,
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.update_link_status = aq_fw2x_update_link_status,
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.update_stats = aq_fw2x_update_stats,
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.update_stats = aq_fw2x_update_stats,
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.get_phy_temp = aq_fw2x_get_phy_temp,
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.set_power = aq_fw2x_set_power,
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.set_power = aq_fw2x_set_power,
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.set_eee_rate = aq_fw2x_set_eee_rate,
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.set_eee_rate = aq_fw2x_set_eee_rate,
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.get_eee_rate = aq_fw2x_get_eee_rate,
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.get_eee_rate = aq_fw2x_get_eee_rate,
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