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ARM: mvebu: enable the ARM SCU on Armada 375 and Armada 38x

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Contrary to the Armada 370 and XP that used the PJ4B Marvell cores,
the Armada 375 and Armada 38x use the ARM Cortex-A9. A consequence of
this is that the unit responsible for the coherency between CPUs is
now the ARM SCU, and not the Marvell coherency unit (which is still
present to do coherency with I/O devices).

Therefore this commit:

 * Ensures that the selection of the Armada 375 or Armada 38x SoC
   support enables the ARM SCU support in the kernel.

 * Make sure to initialize the SCU at boot time.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483228-25625-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Thomas Petazzoni 2014-04-14 15:47:03 +02:00 committed by Jason Cooper
parent 5fbba08051
commit 8e6ac20338
2 changed files with 21 additions and 0 deletions
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2
arch/arm/mach-mvebu/Kconfig
View File

@ -40,6 +40,7 @@ config MACH_ARMADA_375
select ARM_GIC
select ARMADA_375_CLK
select CPU_V7
select HAVE_ARM_SCU
select MACH_MVEBU_V7
select PINCTRL_ARMADA_375
help
@ -53,6 +54,7 @@ config MACH_ARMADA_38X
select ARM_GIC
select ARMADA_38X_CLK
select CPU_V7
select HAVE_ARM_SCU
select MACH_MVEBU_V7
select PINCTRL_ARMADA_38X
help

19
arch/arm/mach-mvebu/board-v7.c
View File

@ -27,11 +27,29 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/smp_scu.h>
#include "armada-370-xp.h"
#include "common.h"
#include "coherency.h"
#include "mvebu-soc-id.h"
/*
* Enables the SCU when available. Obviously, this is only useful on
* Cortex-A based SOCs, not on PJ4B based ones.
*/
static void __init mvebu_scu_enable(void)
{
void __iomem *scu_base;
struct device_node *np =
of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
if (np) {
scu_base = of_iomap(np, 0);
scu_enable(scu_base);
of_node_put(np);
}
}
/*
* Early versions of Armada 375 SoC have a bug where the BootROM
* leaves an external data abort pending. The kernel is hit by this
@ -57,6 +75,7 @@ static void __init mvebu_timer_and_clk_init(void)
{
of_clk_init(NULL);
clocksource_of_init();
mvebu_scu_enable();
coherency_init();
BUG_ON(mvebu_mbus_dt_init(coherency_available()));
#ifdef CONFIG_CACHE_L2X0