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x86/microcode: Update the new microcode revision unconditionally

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Handle the case where microcode gets loaded on the BSP's hyperthread
sibling first and the boot_cpu_data's microcode revision doesn't get
updated because of early exit due to the siblings sharing a microcode
engine.

For that, simply write the updated revision on all CPUs unconditionally.

Signed-off-by: Filippo Sironi <sironi@amazon.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: prarit@redhat.com
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1533050970-14385-1-git-send-email-sironi@amazon.de
This commit is contained in:
Filippo Sironi
2018-07-31 17:29:30 +02:00
committed by Thomas Gleixner
parent 370a132bb2
commit 8da38ebaad
2 changed files with 21 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
arch/x86/kernel/cpu/microcode/amd.c
View File

@@ -504,6 +504,7 @@ static enum ucode_state apply_microcode_amd(int cpu)
struct microcode_amd *mc_amd; struct microcode_amd *mc_amd;
struct ucode_cpu_info *uci; struct ucode_cpu_info *uci;
struct ucode_patch *p; struct ucode_patch *p;
enum ucode_state ret;
u32 rev, dummy; u32 rev, dummy;
BUG_ON(raw_smp_processor_id() != cpu); BUG_ON(raw_smp_processor_id() != cpu);
@@ -521,9 +522,8 @@ static enum ucode_state apply_microcode_amd(int cpu)
/* need to apply patch? */ /* need to apply patch? */
if (rev >= mc_amd->hdr.patch_id) { if (rev >= mc_amd->hdr.patch_id) {
c->microcode = rev; ret = UCODE_OK;
uci->cpu_sig.rev = rev; goto out;
return UCODE_OK;
} }
if (__apply_microcode_amd(mc_amd)) { if (__apply_microcode_amd(mc_amd)) {
@@ -531,17 +531,21 @@ static enum ucode_state apply_microcode_amd(int cpu)
cpu, mc_amd->hdr.patch_id); cpu, mc_amd->hdr.patch_id);
return UCODE_ERROR; return UCODE_ERROR;
} }
pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
mc_amd->hdr.patch_id);
uci->cpu_sig.rev = mc_amd->hdr.patch_id; rev = mc_amd->hdr.patch_id;
c->microcode = mc_amd->hdr.patch_id; ret = UCODE_UPDATED;
pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
out:
uci->cpu_sig.rev = rev;
c->microcode = rev;
/* Update boot_cpu_data's revision too, if we're on the BSP: */ /* Update boot_cpu_data's revision too, if we're on the BSP: */
if (c->cpu_index == boot_cpu_data.cpu_index) if (c->cpu_index == boot_cpu_data.cpu_index)
boot_cpu_data.microcode = mc_amd->hdr.patch_id; boot_cpu_data.microcode = rev;
return UCODE_UPDATED; return ret;
} }
static int install_equiv_cpu_table(const u8 *buf) static int install_equiv_cpu_table(const u8 *buf)

11
arch/x86/kernel/cpu/microcode/intel.c
View File

@@ -795,6 +795,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
struct ucode_cpu_info *uci = ucode_cpu_info + cpu; struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
struct cpuinfo_x86 *c = &cpu_data(cpu); struct cpuinfo_x86 *c = &cpu_data(cpu);
struct microcode_intel *mc; struct microcode_intel *mc;
enum ucode_state ret;
static int prev_rev; static int prev_rev;
u32 rev; u32 rev;
@@ -817,9 +818,8 @@ static enum ucode_state apply_microcode_intel(int cpu)
*/ */
rev = intel_get_microcode_revision(); rev = intel_get_microcode_revision();
if (rev >= mc->hdr.rev) { if (rev >= mc->hdr.rev) {
uci->cpu_sig.rev = rev; ret = UCODE_OK;
c->microcode = rev; goto out;
return UCODE_OK;
} }
/* /*
@@ -848,6 +848,9 @@ static enum ucode_state apply_microcode_intel(int cpu)
prev_rev = rev; prev_rev = rev;
} }
ret = UCODE_UPDATED;
out:
uci->cpu_sig.rev = rev; uci->cpu_sig.rev = rev;
c->microcode = rev; c->microcode = rev;
@@ -855,7 +858,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
if (c->cpu_index == boot_cpu_data.cpu_index) if (c->cpu_index == boot_cpu_data.cpu_index)
boot_cpu_data.microcode = rev; boot_cpu_data.microcode = rev;
return UCODE_UPDATED; return ret;
} }
static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,