drm/amdgpu: restrict bo mapping within gpu address limits
Have strict check on bo mapping since on some systems, such as A+A or hybrid, the cpu might support 5 level paging or can address memory above 48 bits but gpu might be limited by hardware to just use 48 bits. In general, this applies to all asics where this limitation can be checked against their max_pfn range. This restricts the range to map bo within pratical limits of cpu and gpu for shared virtual memory access. Reviewed-by: Oak Zeng <oak.zeng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher
parent
81a1624111
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8b80d74bdb
@@ -2208,7 +2208,8 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
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/* make sure object fit at this offset */
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eaddr = saddr + size - 1;
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if (saddr >= eaddr ||
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(bo && offset + size > amdgpu_bo_size(bo)))
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(bo && offset + size > amdgpu_bo_size(bo)) ||
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(eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT))
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return -EINVAL;
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saddr /= AMDGPU_GPU_PAGE_SIZE;
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@@ -2273,7 +2274,8 @@ int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev,
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/* make sure object fit at this offset */
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eaddr = saddr + size - 1;
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if (saddr >= eaddr ||
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(bo && offset + size > amdgpu_bo_size(bo)))
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(bo && offset + size > amdgpu_bo_size(bo)) ||
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(eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT))
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return -EINVAL;
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/* Allocate all the needed memory */
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