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x86, irq, SFI: Release IOAPIC pin when PCI device is disabled

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Release IOAPIC pin associated with PCI device when the PCI device
is disabled.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Link: http://lkml.kernel.org/r/1402302011-23642-41-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Jiang Liu 2014-06-09 16:20:09 +08:00 committed by Thomas Gleixner
parent c03b3b0738
commit 8a3e533df1
1 changed files with 7 additions and 0 deletions
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7
arch/x86/pci/intel_mid_pci.c
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@ -227,6 +227,12 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
return 0;
}
static void intel_mid_pci_irq_disable(struct pci_dev *dev)
{
if (dev->irq > 0)
mp_unmap_irq(dev->irq);
}
struct pci_ops intel_mid_pci_ops = {
.read = pci_read,
.write = pci_write,
@ -243,6 +249,7 @@ int __init intel_mid_pci_init(void)
pr_info("Intel MID platform detected, using MID PCI ops\n");
pci_mmcfg_late_init();
pcibios_enable_irq = intel_mid_pci_irq_enable;
pcibios_disable_irq = intel_mid_pci_irq_disable;
pci_root_ops = intel_mid_pci_ops;
pci_soc_mode = 1;
/* Continue with standard init */