Merge tag 'imx-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.7:

 - Set correct AHB clock for i.MX8MN SDMA1 device to fix a "Timeout
   waiting for CH0" error.
 - Fix a linker error for i.MX6 configurations that have ARM_CPU_SUSPEND=n,
   which can happen if neither CONFIG_PM, CONFIG_CPU_IDLE, nor ARM_PSCI_FW
   are selected.
 - Fix I2C1 pinctrl configuration for i.MX27 phytec-phycard board.
 - Fix i.MX8M  AIPS 'reg' properties to remove DTC simple_bus_reg
   warnings.
 - Add missing compatible "fsl,vf610-edma" for LS1028A EDMA device, so
   that bootloader can fix up the IOMMU entries there.  Otherwise, EDMA
   just doesn't work on LS1028A with shipped bootloader.
 - Fix imx6dl-yapp4-ursa board Ethernet connection.
 - Fix input_val for AUDIOMIX_BIT_STREAM pinctrl defines on i.MX8MP
   according to Reference Manual.

* tag 'imx-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: freescale: imx8mp: update input_val for AUDIOMIX_BIT_STREAM
  arm64: dts: imx8m: Fix AIPS reg properties
  arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn
  ARM: dts: imx27-phytec-phycard-s-rdk: Fix the I2C1 pinctrl entries
  ARM: imx: provide v7_cpu_resume() only on ARM_CPU_SUSPEND=y
  ARM: dts: imx6dl-yapp4: Fix Ursa board Ethernet connection
  arm64: dts: ls1028a: add "fsl,vf610-edma" compatible
  dt-bindings: dma: fsl-edma: fix ls1028a-edma compatible

Link: https://lore.kernel.org/r/20200429063226.GT32592@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2020-05-14 00:00:06 +02:00
9 changed files with 45 additions and 44 deletions

View File

@@ -10,7 +10,8 @@ Required properties:
- compatible :
- "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
- "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
- "fsl,fsl,ls1028a-edma" for eDMA used similar to that on Vybrid vf610 SoC
- "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the
LS1028A SoC.
- reg : Specifies base physical address(s) and size of the eDMA registers.
The 1st region is eDMA control register's address and size.
The 2nd and the 3rd regions are programmable channel multiplexing