leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

First round of IIO fixes for the 4.10 cycle.

Browse Source 
* 104-quad-8
   - Fix selecting wrong register when the index control register is desired.
   - Fix an off by one error when addressing the input/output control register.
   - Fix inverted logic on the active high / low control
 * bmi160
   - Sleep for worst case rather than best case amount of time after cmd
   execution begins.
 * max44000
   - typo fix in illuminance_integration_time_available listing.
 * st-sensors
   - Fix channel data passing.  This one took a while to get tested on 24bit
   parts. Definitely one for stable asap as the bug broke quite a few parts.
   - lis3lv02 needs a data alignment bit set and the scaling was wrong.
 * ti_am335x
   - depend on HAS_DMA
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAlhnxPERHGppYzIzQGtl
 cm5lbC5vcmcACgkQVIU0mcT0Fojkwg//TD9jlh6x/Xt7qi0EgC1c8Ie0Dr6iUsQr
 gYgvVMtIsjSlThXGtLWxjDLzLeW1DUpxwjy9Kqnwt5onBgBnQj5PAL/lptH7/e6z
 hxj6lXvz5j1pcjjyXzhMa4JPIZJUU75Jj4airhGoHdvTFQDzqKr9GpLKUnrf4lwt
 HWFtCcT90ckhg/PTTaxfIhI4gEHBHoVx9h1/3Tn4VImhE693rLPSs1nS7+hEQIn2
 LZbCMAtxMh3qcCIK9fYrri3e+28KJ7veiWE8mYynxBd6Wa6OGq/D316Ml616mRgZ
 3SpyDWy05YtM4nVNi1kFwKTHb3v6Ljeyno0lmP0joJlIGLwHJS1qDGL0Wps6RI87
 utrfcZKOI2hcoFm49OMYdV3MJ18umGo0asOFMlH6u0RaLXXAz7hN1l9nyB5VzejT
 8culF/8XgNYuzFhkD65Ecksoz0azfMwXphwyPm3WEt1EE5meMeXt6bVsfI+8vyhp
 e/TfhloVfLUobau5yF2C+ih7xrHkVta+f860jqCkiHqngUgzksLoah53mA2Wh36f
 2+D6RbEFEo6Fx4DoELm55CZKpVFv9Ia1ICkg2kuJCFBXL8aTAAYmyphyPDccXGSs
 G2DZCAUjJ1sP7xPVMGuLD7A/IvggUDbs8m0i2sVq4JRZVLRfBW9khjGaCmjOAWBY
 ijWzzZtUywo=
 =aYfF
 -----END PGP SIGNATURE-----

Merge tag 'iio-fixes-for-4.10a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus

Jonathan writes:

First round of IIO fixes for the 4.10 cycle.

* 104-quad-8
  - Fix selecting wrong register when the index control register is desired.
  - Fix an off by one error when addressing the input/output control register.
  - Fix inverted logic on the active high / low control
* bmi160
  - Sleep for worst case rather than best case amount of time after cmd
  execution begins.
* max44000
  - typo fix in illuminance_integration_time_available listing.
* st-sensors
  - Fix channel data passing.  This one took a while to get tested on 24bit
  parts. Definitely one for stable asap as the bug broke quite a few parts.
  - lis3lv02 needs a data alignment bit set and the scaling was wrong.
* ti_am335x
  - depend on HAS_DMA
This commit is contained in:
Greg Kroah-Hartman 2017-01-02 16:59:44 +01:00
commit 890b73af6b
8 changed files with 53 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/iio/accel/st_accel_core.c
View File

@ -353,12 +353,12 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
[0] = { [0] = {
.num = ST_ACCEL_FS_AVL_2G, .num = ST_ACCEL_FS_AVL_2G,
.value = 0x00, .value = 0x00,
.gain = IIO_G_TO_M_S_2(1024), .gain = IIO_G_TO_M_S_2(1000),
}, },
[1] = { [1] = {
.num = ST_ACCEL_FS_AVL_6G, .num = ST_ACCEL_FS_AVL_6G,
.value = 0x01, .value = 0x01,
.gain = IIO_G_TO_M_S_2(340), .gain = IIO_G_TO_M_S_2(3000),
}, },
}, },
}, },
@ -366,6 +366,14 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.addr = 0x21, .addr = 0x21,
.mask = 0x40, .mask = 0x40,
}, },
/*
* Data Alignment Setting - needs to be set to get
* left-justified data like all other sensors.
*/
.das = {
.addr = 0x21,
.mask = 0x01,
},
.drdy_irq = { .drdy_irq = {
.addr = 0x21, .addr = 0x21,
.mask_int1 = 0x04, .mask_int1 = 0x04,

2
drivers/iio/adc/Kconfig
View File

@ -561,7 +561,7 @@ config TI_ADS8688
config TI_AM335X_ADC config TI_AM335X_ADC
tristate "TI's AM335X ADC driver" tristate "TI's AM335X ADC driver"
depends on MFD_TI_AM335X_TSCADC depends on MFD_TI_AM335X_TSCADC && HAS_DMA
select IIO_BUFFER select IIO_BUFFER
select IIO_KFIFO_BUF select IIO_KFIFO_BUF
help help

4
drivers/iio/common/st_sensors/st_sensors_buffer.c
View File

@ -30,7 +30,9 @@ static int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf)
for_each_set_bit(i, indio_dev->active_scan_mask, num_data_channels) { for_each_set_bit(i, indio_dev->active_scan_mask, num_data_channels) {
const struct iio_chan_spec *channel = &indio_dev->channels[i]; const struct iio_chan_spec *channel = &indio_dev->channels[i];
unsigned int bytes_to_read = channel->scan_type.realbits >> 3; unsigned int bytes_to_read =
DIV_ROUND_UP(channel->scan_type.realbits +
channel->scan_type.shift, 8);
unsigned int storage_bytes = unsigned int storage_bytes =
channel->scan_type.storagebits >> 3; channel->scan_type.storagebits >> 3;

13
drivers/iio/common/st_sensors/st_sensors_core.c
View File

@ -401,6 +401,15 @@ int st_sensors_init_sensor(struct iio_dev *indio_dev,
return err; return err;
} }
/* set DAS */
if (sdata->sensor_settings->das.addr) {
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->das.addr,
sdata->sensor_settings->das.mask, 1);
if (err < 0)
return err;
}
if (sdata->int_pin_open_drain) { if (sdata->int_pin_open_drain) {
dev_info(&indio_dev->dev, dev_info(&indio_dev->dev,
"set interrupt line to open drain mode\n"); "set interrupt line to open drain mode\n");
@ -483,8 +492,10 @@ static int st_sensors_read_axis_data(struct iio_dev *indio_dev,
int err; int err;
u8 *outdata; u8 *outdata;
struct st_sensor_data *sdata = iio_priv(indio_dev); struct st_sensor_data *sdata = iio_priv(indio_dev);
unsigned int byte_for_channel = ch->scan_type.realbits >> 3; unsigned int byte_for_channel;
byte_for_channel = DIV_ROUND_UP(ch->scan_type.realbits +
ch->scan_type.shift, 8);
outdata = kmalloc(byte_for_channel, GFP_KERNEL); outdata = kmalloc(byte_for_channel, GFP_KERNEL);
if (!outdata) if (!outdata)
return -ENOMEM; return -ENOMEM;

13
drivers/iio/counter/104-quad-8.c
View File

@ -153,7 +153,7 @@ static int quad8_write_raw(struct iio_dev *indio_dev,
ior_cfg = val | priv->preset_enable[chan->channel] << 1; ior_cfg = val | priv->preset_enable[chan->channel] << 1;
/* Load I/O control configuration */ /* Load I/O control configuration */
outb(0x40 | ior_cfg, base_offset); outb(0x40 | ior_cfg, base_offset + 1);
return 0; return 0;
case IIO_CHAN_INFO_SCALE: case IIO_CHAN_INFO_SCALE:
@ -233,7 +233,7 @@ static ssize_t quad8_read_set_to_preset_on_index(struct iio_dev *indio_dev,
const struct quad8_iio *const priv = iio_priv(indio_dev); const struct quad8_iio *const priv = iio_priv(indio_dev);
return snprintf(buf, PAGE_SIZE, "%u\n", return snprintf(buf, PAGE_SIZE, "%u\n",
priv->preset_enable[chan->channel]); !priv->preset_enable[chan->channel]);
} }
static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
@ -241,7 +241,7 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
size_t len) size_t len)
{ {
struct quad8_iio *const priv = iio_priv(indio_dev); struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel; const int base_offset = priv->base + 2 * chan->channel + 1;
bool preset_enable; bool preset_enable;
int ret; int ret;
unsigned int ior_cfg; unsigned int ior_cfg;
@ -250,6 +250,9 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
if (ret) if (ret)
return ret; return ret;
/* Preset enable is active low in Input/Output Control register */
preset_enable = !preset_enable;
priv->preset_enable[chan->channel] = preset_enable; priv->preset_enable[chan->channel] = preset_enable;
ior_cfg = priv->ab_enable[chan->channel] | ior_cfg = priv->ab_enable[chan->channel] |
@ -362,7 +365,7 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev,
priv->synchronous_mode[chan->channel] = synchronous_mode; priv->synchronous_mode[chan->channel] = synchronous_mode;
/* Load Index Control configuration to Index Control Register */ /* Load Index Control configuration to Index Control Register */
outb(0x40 | idr_cfg, base_offset); outb(0x60 | idr_cfg, base_offset);
return 0; return 0;
} }
@ -444,7 +447,7 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev,
priv->index_polarity[chan->channel] = index_polarity; priv->index_polarity[chan->channel] = index_polarity;
/* Load Index Control configuration to Index Control Register */ /* Load Index Control configuration to Index Control Register */
outb(0x40 | idr_cfg, base_offset); outb(0x60 | idr_cfg, base_offset);
return 0; return 0;
} }

25
drivers/iio/imu/bmi160/bmi160_core.c
View File

@ -66,10 +66,8 @@
#define BMI160_REG_DUMMY 0x7F #define BMI160_REG_DUMMY 0x7F
#define BMI160_ACCEL_PMU_MIN_USLEEP 3200 #define BMI160_ACCEL_PMU_MIN_USLEEP 3800
#define BMI160_ACCEL_PMU_MAX_USLEEP 3800 #define BMI160_GYRO_PMU_MIN_USLEEP 80000
#define BMI160_GYRO_PMU_MIN_USLEEP 55000
#define BMI160_GYRO_PMU_MAX_USLEEP 80000
#define BMI160_SOFTRESET_USLEEP 1000 #define BMI160_SOFTRESET_USLEEP 1000
#define BMI160_CHANNEL(_type, _axis, _index) { \ #define BMI160_CHANNEL(_type, _axis, _index) { \
@ -151,20 +149,9 @@ static struct bmi160_regs bmi160_regs[] = {
}, },
}; };
struct bmi160_pmu_time { static unsigned long bmi160_pmu_time[] = {
unsigned long min; [BMI160_ACCEL] = BMI160_ACCEL_PMU_MIN_USLEEP,
unsigned long max; [BMI160_GYRO] = BMI160_GYRO_PMU_MIN_USLEEP,
};
static struct bmi160_pmu_time bmi160_pmu_time[] = {
[BMI160_ACCEL] = {
.min = BMI160_ACCEL_PMU_MIN_USLEEP,
.max = BMI160_ACCEL_PMU_MAX_USLEEP
},
[BMI160_GYRO] = {
.min = BMI160_GYRO_PMU_MIN_USLEEP,
.max = BMI160_GYRO_PMU_MIN_USLEEP,
},
}; };
struct bmi160_scale { struct bmi160_scale {
@ -289,7 +276,7 @@ int bmi160_set_mode(struct bmi160_data *data, enum bmi160_sensor_type t,
if (ret < 0) if (ret < 0)
return ret; return ret;
usleep_range(bmi160_pmu_time[t].min, bmi160_pmu_time[t].max); usleep_range(bmi160_pmu_time[t], bmi160_pmu_time[t] + 1000);
return 0; return 0;
} }

2
drivers/iio/light/max44000.c
View File

@ -113,7 +113,7 @@ static const char max44000_int_time_avail_str[] =
"0.100 " "0.100 "
"0.025 " "0.025 "
"0.00625 " "0.00625 "
"0.001625"; "0.0015625";
/* Available scales (internal to ulux) with pretty manual alignment: */ /* Available scales (internal to ulux) with pretty manual alignment: */
static const int max44000_scale_avail_ulux_array[] = { static const int max44000_scale_avail_ulux_array[] = {

12
include/linux/iio/common/st_sensors.h
View File

@ -115,6 +115,16 @@ struct st_sensor_bdu {
u8 mask; u8 mask;
}; };
/**
* struct st_sensor_das - ST sensor device data alignment selection
* @addr: address of the register.
* @mask: mask to write the das flag for left alignment.
*/
struct st_sensor_das {
u8 addr;
u8 mask;
};
/** /**
* struct st_sensor_data_ready_irq - ST sensor device data-ready interrupt * struct st_sensor_data_ready_irq - ST sensor device data-ready interrupt
* @addr: address of the register. * @addr: address of the register.
@ -185,6 +195,7 @@ struct st_sensor_transfer_function {
* @enable_axis: Enable one or more axis of the sensor. * @enable_axis: Enable one or more axis of the sensor.
* @fs: Full scale register and full scale list available. * @fs: Full scale register and full scale list available.
* @bdu: Block data update register. * @bdu: Block data update register.
* @das: Data Alignment Selection register.
* @drdy_irq: Data ready register of the sensor. * @drdy_irq: Data ready register of the sensor.
* @multi_read_bit: Use or not particular bit for [I2C/SPI] multi-read. * @multi_read_bit: Use or not particular bit for [I2C/SPI] multi-read.
* @bootime: samples to discard when sensor passing from power-down to power-up. * @bootime: samples to discard when sensor passing from power-down to power-up.
@ -200,6 +211,7 @@ struct st_sensor_settings {
struct st_sensor_axis enable_axis; struct st_sensor_axis enable_axis;
struct st_sensor_fullscale fs; struct st_sensor_fullscale fs;
struct st_sensor_bdu bdu; struct st_sensor_bdu bdu;
struct st_sensor_das das;
struct st_sensor_data_ready_irq drdy_irq; struct st_sensor_data_ready_irq drdy_irq;
bool multi_read_bit; bool multi_read_bit;
unsigned int bootime; unsigned int bootime;