drm/amd/display: fix calculation of total_data_read_bandwidth
[why] by adding fast_validate flag, we are skipping some portion of dcn_validate_bandwidth code that is not necessary for mode validation. However we have a bug where it does not calculate v->total_data_read_bandwidth, which is one of the factors determines the result of the validation, and therefore report false positive during mode validation. [how] add calculation of v->total_data_read_bandwidth outside of the region that is guarded by fast_validate flag Signed-off-by: Su Sung Chung <Su.Chung@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -711,7 +711,7 @@ bool dcn_validate_bandwidth(
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const struct resource_pool *pool = dc->res_pool;
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struct dcn_bw_internal_vars *v = &context->dcn_bw_vars;
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int i, input_idx;
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int i, input_idx, k;
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int vesa_sync_start, asic_blank_end, asic_blank_start;
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bool bw_limit_pass;
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float bw_limit;
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@ -1022,6 +1022,43 @@ bool dcn_validate_bandwidth(
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mode_support_and_system_configuration(v);
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}
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display_pipe_configuration(v);
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for (k = 0; k <= v->number_of_active_planes - 1; k++) {
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if (v->source_scan[k] == dcn_bw_hor)
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v->swath_width_y[k] = v->viewport_width[k] / v->dpp_per_plane[k];
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else
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v->swath_width_y[k] = v->viewport_height[k] / v->dpp_per_plane[k];
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}
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for (k = 0; k <= v->number_of_active_planes - 1; k++) {
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if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64) {
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v->byte_per_pixel_dety[k] = 8.0;
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v->byte_per_pixel_detc[k] = 0.0;
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} else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_32) {
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v->byte_per_pixel_dety[k] = 4.0;
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v->byte_per_pixel_detc[k] = 0.0;
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} else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_16) {
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v->byte_per_pixel_dety[k] = 2.0;
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v->byte_per_pixel_detc[k] = 0.0;
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} else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) {
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v->byte_per_pixel_dety[k] = 1.0;
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v->byte_per_pixel_detc[k] = 2.0;
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} else {
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v->byte_per_pixel_dety[k] = 4.0f / 3.0f;
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v->byte_per_pixel_detc[k] = 8.0f / 3.0f;
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}
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}
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v->total_data_read_bandwidth = 0.0;
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for (k = 0; k <= v->number_of_active_planes - 1; k++) {
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v->read_bandwidth_plane_luma[k] = v->swath_width_y[k] * v->dpp_per_plane[k] *
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dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / (v->htotal[k] / v->pixel_clock[k]) * v->v_ratio[k];
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v->read_bandwidth_plane_chroma[k] = v->swath_width_y[k] / 2.0 * v->dpp_per_plane[k] *
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dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / (v->htotal[k] / v->pixel_clock[k]) * v->v_ratio[k] / 2.0;
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v->total_data_read_bandwidth = v->total_data_read_bandwidth +
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v->read_bandwidth_plane_luma[k] + v->read_bandwidth_plane_chroma[k];
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}
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BW_VAL_TRACE_END_VOLTAGE_LEVEL();
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if (v->voltage_level != number_of_states_plus_one && !fast_validate) {
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