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drm/amdgpu: add system interrupt register offset header

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Add new register offset for enabling system interrupt.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Boyuan Zhang 2018-07-18 16:13:29 -04:00 committed by Alex Deucher
parent eb4f699920
commit 8709890892
1 changed files with 2 additions and 0 deletions
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drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
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@ -307,6 +307,8 @@
#define mmUVD_LMI_CTRL2_BASE_IDX 1
#define mmUVD_MASTINT_EN 0x0540
#define mmUVD_MASTINT_EN_BASE_IDX 1
#define mmUVD_SYS_INT_EN 0x0541
#define mmUVD_SYS_INT_EN_BASE_IDX 1
#define mmJPEG_CGC_CTRL 0x0565
#define mmJPEG_CGC_CTRL_BASE_IDX 1
#define mmUVD_LMI_CTRL 0x0566