forked from Minki/linux
Renesas Clocksource Updates for v3.18
* Document per-SoC bindings -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUDmfmAAoJENfPZGlqN0++78gP/0Pb7FxcZWqfICjZ9cNYGaLv 2jPgM/0jsyEuMlR6Wcosl2OLszRzyK3TGek7QrDWsoSGaVX7Z2w0NAr9CeaBWxjD wj7hAKrAZIv2J7Ia/c55Mld0xTskJ9uQCQSLkTM6k0vDZm0r7B7qZOwvt9jfz8TS s/jX3X4qJGpHokzeU1t5wAYP7vjgkCSIeybRpHyCw9fvJFDW/EUMZlJ3yzZDtZlf cK0SdpyARSuHDXeA7NHgEkXZ0G5mwvA6gMiE5lsjifCSurlHDj/wX4G0UmncUeIC 3wMjMPNcGHUYtl8xVANB/qqpHH7K5FgHEIJmZyCm+I3nkxpPNhyVzqRdThqOynru Gk7VOhhCIDXQukEr4dKKsouiiL8K5dnR8MzOfxgxJhZaLyZeHbwrzL82Pc1QZo1f m+MxWaTaCRZo2eKr4GeFBe5jr+DzTFLCUIBfo8s8iD3LXpZsKUp/lEk/gvcKpFPB xuNy0dvNJV2YvmhrgOrbVUYAj6CJOuMVckvdq7HshoebUGXp1aeva/i6DHTrmPe7 Gx2zyTN823yUyiKpsXNmw3CdLJq2ObOaHef7kAcSHNJ67pny0B3QxwY2XUd3cZWu rJBijVYnZyPODD+HnyiRlGlHd4QAbWMMUNxcAmTl+sG2Elzan3sFt3qINl+WJjoR NJswxr0Hy8TaySUHsvZf =uqoV -----END PGP SIGNATURE----- Merge tag 'renesas-clocksource-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into clockevents/3.18 Renesas Clocksource Updates for v3.18 * Document per-SoC bindings Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -11,15 +11,47 @@ datasheets.
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Required Properties:
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- compatible: must contain one of the following.
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- "renesas,cmt-32" for the 32-bit CMT
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- compatible: must contain one or more of the following:
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- "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT
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(CMT0)
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- "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT
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(CMT0)
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- "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT
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(CMT0)
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- "renesas,cmt-32" for all 32-bit CMT without fast clock support
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(CMT0 on sh7372, sh73a0 and r8a7740)
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- "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support
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This is a fallback for the above renesas,cmt-32-* entries.
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- "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast
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clock support (CMT[234])
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- "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast
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clock support (CMT[234])
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- "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast
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clock support (CMT[234])
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- "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support
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(CMT[234] on sh7372, sh73a0 and r8a7740)
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- "renesas,cmt-48" for the 48-bit CMT
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This is a fallback for the above renesas,cmt-32-fast-* entries.
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- "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT
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(CMT1)
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- "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
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(CMT1)
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- "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
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(CMT1)
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- "renesas,cmt-48" for all non-second generation 48-bit CMT
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(CMT1 on sh7372, sh73a0 and r8a7740)
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- "renesas,cmt-48-gen2" for the second generation 48-bit CMT
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This is a fallback for the above renesas,cmt-48-* entries.
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- "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT
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(CMT[01])
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- "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT
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(CMT[01])
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- "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT
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(CMT[01])
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- "renesas,cmt-48-gen2" for all second generation 48-bit CMT
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(CMT[01] on r8a73a4, r8a7790 and r8a7791)
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This is a fallback for the renesas,cmt-48-r8a73a4,
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renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.
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- reg: base address and length of the registers block for the timer module.
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- interrupts: interrupt-specifier for the timer, one per channel.
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@ -36,7 +68,7 @@ Example: R8A7790 (R-Car H2) CMT0 node
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them channels 0 and 1 in the documentation.
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cmt0: timer@ffca0000 {
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compatible = "renesas,cmt-48-gen2";
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compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
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reg = <0 0xffca0000 0 0x1004>;
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interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
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<0 142 IRQ_TYPE_LEVEL_HIGH>;
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@ -8,7 +8,10 @@ are independent. The MTU2 hardware supports five channels indexed from 0 to 4.
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Required Properties:
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- compatible: must contain "renesas,mtu2"
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- compatible: must be one or more of the following:
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- "renesas,mtu2-r7s72100" for the r7s72100 MTU2
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- "renesas,mtu2" for any MTU2
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This is a fallback for the above renesas,mtu2-* entries
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- reg: base address and length of the registers block for the timer module.
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@ -26,7 +29,7 @@ Required Properties:
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Example: R7S72100 (RZ/A1H) MTU2 node
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mtu2: timer@fcff0000 {
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compatible = "renesas,mtu2";
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compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
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reg = <0xfcff0000 0x400>;
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interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>,
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<0 146 IRQ_TYPE_LEVEL_HIGH>,
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@ -8,7 +8,10 @@ are independent. The TMU hardware supports up to three channels.
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Required Properties:
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- compatible: must contain "renesas,tmu"
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- compatible: must contain one or more of the following:
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- "renesas,tmu-r8a7779" for the r8a7779 TMU
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- "renesas,tmu" for any TMU.
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This is a fallback for the above renesas,tmu-* entries
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- reg: base address and length of the registers block for the timer module.
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@ -27,7 +30,7 @@ Optional Properties:
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Example: R8A7779 (R-Car H1) TMU0 node
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tmu0: timer@ffd80000 {
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compatible = "renesas,tmu";
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compatible = "renesas,tmu-r8a7779", "renesas,tmu";
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reg = <0xffd80000 0x30>;
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interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
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<0 33 IRQ_TYPE_LEVEL_HIGH>,
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