forked from Minki/linux
[POWERPC] Celleb: bug fix caused by not casting pointer types
This fixes a bug caused by changes of pointer type in
commit f1fda89522.
hose->cfg_addr type is "volatile unsigned int __iomem *", so
"hose->cfg_addr + X" will not make an intended address.
This patch also adds comments for usage of cfg_addr and cfg_data in
pci_controller structure. We use them in irregular way, and the
original code is short of explanations about them.
Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Ishizaki Kou
Paul Mackerras
parent
c99176a230
commit
8388374f1c
@ -43,11 +43,34 @@
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#define iob() __asm__ __volatile__("eieio; sync":::"memory")
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static inline volatile void __iomem *celleb_epci_get_epci_base(
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struct pci_controller *hose)
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{
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/*
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* Note:
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* Celleb epci uses cfg_addr as a base address for
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* epci control registers.
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*/
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return hose->cfg_addr;
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}
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static inline volatile void __iomem *celleb_epci_get_epci_cfg(
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struct pci_controller *hose)
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{
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/*
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* Note:
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* Celleb epci uses cfg_data as a base address for
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* configuration area for epci devices.
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*/
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return hose->cfg_data;
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}
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#if 0 /* test code for epci dummy read */
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static void celleb_epci_dummy_read(struct pci_dev *dev)
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{
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void __iomem *epci_base;
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volatile void __iomem *epci_base;
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struct device_node *node;
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struct pci_controller *hose;
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u32 val;
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@ -58,7 +81,7 @@ static void celleb_epci_dummy_read(struct pci_dev *dev)
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if (!hose)
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return;
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epci_base = hose->cfg_addr;
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epci_base = celleb_epci_get_epci_base(hose);
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val = in_be32(epci_base + SCC_EPCI_WATRP);
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iosync();
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@ -70,19 +93,20 @@ static void celleb_epci_dummy_read(struct pci_dev *dev)
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static inline void clear_and_disable_master_abort_interrupt(
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struct pci_controller *hose)
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{
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void __iomem *addr;
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addr = hose->cfg_addr + PCI_COMMAND;
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out_be32(addr, in_be32(addr) | (PCI_STATUS_REC_MASTER_ABORT << 16));
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volatile void __iomem *epci_base, *reg;
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epci_base = celleb_epci_get_epci_base(hose);
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reg = epci_base + PCI_COMMAND;
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out_be32(reg, in_be32(reg) | (PCI_STATUS_REC_MASTER_ABORT << 16));
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}
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static int celleb_epci_check_abort(struct pci_controller *hose,
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void __iomem *addr)
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volatile void __iomem *addr)
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{
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void __iomem *reg, *epci_base;
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volatile void __iomem *reg, *epci_base;
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u32 val;
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iob();
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epci_base = hose->cfg_addr;
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epci_base = celleb_epci_get_epci_base(hose);
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reg = epci_base + PCI_COMMAND;
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val = in_be32(reg);
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@ -108,20 +132,21 @@ static int celleb_epci_check_abort(struct pci_controller *hose,
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return PCIBIOS_SUCCESSFUL;
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}
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static void __iomem *celleb_epci_make_config_addr(struct pci_controller *hose,
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static volatile void __iomem *celleb_epci_make_config_addr(
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struct pci_controller *hose,
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unsigned int devfn, int where)
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{
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void __iomem *addr;
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volatile void __iomem *addr;
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struct pci_bus *bus = hose->bus;
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if (bus->self)
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addr = hose->cfg_data +
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addr = celleb_epci_get_epci_cfg(hose) +
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(((bus->number & 0xff) << 16)
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| ((devfn & 0xff) << 8)
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| (where & 0xff)
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| 0x01000000);
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else
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addr = hose->cfg_data +
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addr = celleb_epci_get_epci_cfg(hose) +
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(((devfn & 0xff) << 8) | (where & 0xff));
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pr_debug("EPCI: config_addr = 0x%p\n", addr);
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@ -132,7 +157,7 @@ static void __iomem *celleb_epci_make_config_addr(struct pci_controller *hose,
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static int celleb_epci_read_config(struct pci_bus *bus,
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unsigned int devfn, int where, int size, u32 * val)
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{
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void __iomem *addr;
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volatile void __iomem *epci_base, *addr;
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struct device_node *node;
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struct pci_controller *hose;
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@ -142,13 +167,14 @@ static int celleb_epci_read_config(struct pci_bus *bus,
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node = (struct device_node *)bus->sysdata;
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hose = pci_find_hose_for_OF_device(node);
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if (!hose->cfg_data)
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if (!celleb_epci_get_epci_cfg(hose))
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (bus->number == hose->first_busno && devfn == 0) {
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/* EPCI controller self */
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addr = hose->cfg_addr + where;
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epci_base = celleb_epci_get_epci_base(hose);
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addr = epci_base + where;
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switch (size) {
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case 1:
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@ -185,7 +211,7 @@ static int celleb_epci_read_config(struct pci_bus *bus,
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}
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pr_debug("EPCI: "
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"addr=0x%lx, devfn=0x%x, where=0x%x, size=0x%x, val=0x%x\n",
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"addr=0x%p, devfn=0x%x, where=0x%x, size=0x%x, val=0x%x\n",
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addr, devfn, where, size, *val);
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return celleb_epci_check_abort(hose, NULL);
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@ -194,7 +220,7 @@ static int celleb_epci_read_config(struct pci_bus *bus,
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static int celleb_epci_write_config(struct pci_bus *bus,
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unsigned int devfn, int where, int size, u32 val)
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{
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void __iomem *addr;
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volatile void __iomem *epci_base, *addr;
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struct device_node *node;
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struct pci_controller *hose;
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@ -204,13 +230,15 @@ static int celleb_epci_write_config(struct pci_bus *bus,
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node = (struct device_node *)bus->sysdata;
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hose = pci_find_hose_for_OF_device(node);
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if (!hose->cfg_data)
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if (!celleb_epci_get_epci_cfg(hose))
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (bus->number == hose->first_busno && devfn == 0) {
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/* EPCI controller self */
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addr = hose->cfg_addr + where;
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epci_base = celleb_epci_get_epci_base(hose);
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addr = epci_base + where;
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switch (size) {
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case 1:
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@ -258,10 +286,10 @@ struct pci_ops celleb_epci_ops = {
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static int __devinit celleb_epci_init(struct pci_controller *hose)
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{
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u32 val;
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void __iomem *reg, *epci_base;
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volatile void __iomem *reg, *epci_base;
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int hwres = 0;
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epci_base = hose->cfg_addr;
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epci_base = celleb_epci_get_epci_base(hose);
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/* PCI core reset(Internal bus and PCI clock) */
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reg = epci_base + SCC_EPCI_CKCTRL;
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@ -382,6 +410,18 @@ int __devinit celleb_setup_epci(struct device_node *node,
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pr_debug("PCI: celleb_setup_epci()\n");
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/*
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* Note:
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* Celleb epci uses cfg_addr and cfg_data member of
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* pci_controller structure in irregular way.
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*
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* cfg_addr is used to map for control registers of
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* celleb epci.
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*
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* cfg_data is used for configuration area of devices
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* on Celleb epci buses.
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*/
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if (of_address_to_resource(node, 0, &r))
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goto error;
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hose->cfg_addr = ioremap(r.start, (r.end - r.start + 1));
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