forked from Minki/linux
PCI: mvebu: Fix duplicate resource requests
With commit669cbc7081
("PCI: Move DT resource setup into devm_pci_alloc_host_bridge()"), the DT 'ranges' is parsed and populated into resources when the host bridge is allocated. The resources are requested as well, but that happens a second time for the mvebu driver in mvebu_pcie_parse_request_resources(). We should only be requesting the additional resources added in mvebu_pcie_parse_request_resources(). These are not added by default because they use custom properties rather than standard DT address translation. Also, the bus ranges was also populated by default, so we can remove it from mvebu_pci_host_probe(). Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=209729 Fixes:669cbc7081
("PCI: Move DT resource setup into devm_pci_alloc_host_bridge()") Link: https://lore.kernel.org/r/20201023145252.2691779-1-robh@kernel.org Reported-by: vtolkm@googlemail.com Tested-by: Jan Kundrát <jan.kundrat@cesnet.cz> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Russell King <linux@armlinux.org.uk>
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parent
9fff3256f9
commit
832ea23427
@ -958,25 +958,16 @@ static void mvebu_pcie_powerdown(struct mvebu_pcie_port *port)
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}
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/*
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* We can't use devm_of_pci_get_host_bridge_resources() because we
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* need to parse our special DT properties encoding the MEM and IO
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* apertures.
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* devm_of_pci_get_host_bridge_resources() only sets up translateable resources,
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* so we need extra resource setup parsing our special DT properties encoding
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* the MEM and IO apertures.
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*/
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static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
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{
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struct device *dev = &pcie->pdev->dev;
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struct device_node *np = dev->of_node;
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struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
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int ret;
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/* Get the bus range */
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ret = of_pci_parse_bus_range(np, &pcie->busn);
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if (ret) {
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dev_err(dev, "failed to parse bus-range property: %d\n", ret);
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return ret;
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}
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pci_add_resource(&bridge->windows, &pcie->busn);
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/* Get the PCIe memory aperture */
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mvebu_mbus_get_pcie_mem_aperture(&pcie->mem);
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if (resource_size(&pcie->mem) == 0) {
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@ -986,6 +977,9 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
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pcie->mem.name = "PCI MEM";
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pci_add_resource(&bridge->windows, &pcie->mem);
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ret = devm_request_resource(dev, &iomem_resource, &pcie->mem);
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if (ret)
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return ret;
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/* Get the PCIe IO aperture */
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mvebu_mbus_get_pcie_io_aperture(&pcie->io);
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@ -999,9 +993,12 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
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pcie->realio.name = "PCI I/O";
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pci_add_resource(&bridge->windows, &pcie->realio);
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ret = devm_request_resource(dev, &ioport_resource, &pcie->realio);
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if (ret)
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return ret;
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}
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return devm_request_pci_bus_resources(dev, &bridge->windows);
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return 0;
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}
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/*
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