forked from Minki/linux
KVM: arm/arm64: vgic-v2: Handle SGI bits in GICD_I{S,C}PENDR0 as WI
A guest is not allowed to inject a SGI (or clear its pending state)
by writing to GICD_ISPENDR0 (resp. GICD_ICPENDR0), as these bits are
defined as WI (as per ARM IHI 0048B 4.3.7 and 4.3.8).
Make sure we correctly emulate the architecture.
Fixes: 96b298000d
("KVM: arm/arm64: vgic-new: Add PENDING registers handlers")
Cc: stable@vger.kernel.org # 4.7+
Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
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@ -195,6 +195,12 @@ static void vgic_hw_irq_spending(struct kvm_vcpu *vcpu, struct vgic_irq *irq,
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vgic_irq_set_phys_active(irq, true);
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}
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static bool is_vgic_v2_sgi(struct kvm_vcpu *vcpu, struct vgic_irq *irq)
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{
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return (vgic_irq_is_sgi(irq->intid) &&
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vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2);
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}
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void vgic_mmio_write_spending(struct kvm_vcpu *vcpu,
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gpa_t addr, unsigned int len,
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unsigned long val)
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@ -207,6 +213,12 @@ void vgic_mmio_write_spending(struct kvm_vcpu *vcpu,
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for_each_set_bit(i, &val, len * 8) {
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struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
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/* GICD_ISPENDR0 SGI bits are WI */
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if (is_vgic_v2_sgi(vcpu, irq)) {
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vgic_put_irq(vcpu->kvm, irq);
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continue;
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}
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raw_spin_lock_irqsave(&irq->irq_lock, flags);
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if (irq->hw)
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vgic_hw_irq_spending(vcpu, irq, is_uaccess);
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@ -254,6 +266,12 @@ void vgic_mmio_write_cpending(struct kvm_vcpu *vcpu,
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for_each_set_bit(i, &val, len * 8) {
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struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
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/* GICD_ICPENDR0 SGI bits are WI */
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if (is_vgic_v2_sgi(vcpu, irq)) {
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vgic_put_irq(vcpu->kvm, irq);
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continue;
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}
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raw_spin_lock_irqsave(&irq->irq_lock, flags);
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if (irq->hw)
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@ -184,7 +184,10 @@ void vgic_v2_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr)
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if (vgic_irq_is_sgi(irq->intid)) {
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u32 src = ffs(irq->source);
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BUG_ON(!src);
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if (WARN_RATELIMIT(!src, "No SGI source for INTID %d\n",
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irq->intid))
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return;
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val |= (src - 1) << GICH_LR_PHYSID_CPUID_SHIFT;
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irq->source &= ~(1 << (src - 1));
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if (irq->source) {
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@ -167,7 +167,10 @@ void vgic_v3_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr)
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model == KVM_DEV_TYPE_ARM_VGIC_V2) {
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u32 src = ffs(irq->source);
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BUG_ON(!src);
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if (WARN_RATELIMIT(!src, "No SGI source for INTID %d\n",
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irq->intid))
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return;
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val |= (src - 1) << GICH_LR_PHYSID_CPUID_SHIFT;
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irq->source &= ~(1 << (src - 1));
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if (irq->source) {
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