forked from Minki/linux
tools headers uapi: Update drm/i915_drm.h
To get the changes in:
e46c2e99f6
("drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)")
That don't cause changes in the generated perf binaries.
To silence this perf build warning:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h'
diff -u tools/include/uapi/drm/i915_drm.h include/uapi/drm/i915_drm.h
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://lkml.kernel.org/n/tip-h6bspm1nomjnpr90333rrx7q@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
parent
949af89af0
commit
82392516e9
@ -1486,9 +1486,73 @@ struct drm_i915_gem_context_param {
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#define I915_CONTEXT_MAX_USER_PRIORITY 1023 /* inclusive */
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#define I915_CONTEXT_DEFAULT_PRIORITY 0
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#define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */
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/*
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* When using the following param, value should be a pointer to
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* drm_i915_gem_context_param_sseu.
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*/
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#define I915_CONTEXT_PARAM_SSEU 0x7
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__u64 value;
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};
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/**
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* Context SSEU programming
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*
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* It may be necessary for either functional or performance reason to configure
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* a context to run with a reduced number of SSEU (where SSEU stands for Slice/
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* Sub-slice/EU).
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*
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* This is done by configuring SSEU configuration using the below
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* @struct drm_i915_gem_context_param_sseu for every supported engine which
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* userspace intends to use.
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*
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* Not all GPUs or engines support this functionality in which case an error
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* code -ENODEV will be returned.
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*
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* Also, flexibility of possible SSEU configuration permutations varies between
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* GPU generations and software imposed limitations. Requesting such a
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* combination will return an error code of -EINVAL.
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*
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* NOTE: When perf/OA is active the context's SSEU configuration is ignored in
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* favour of a single global setting.
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*/
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struct drm_i915_gem_context_param_sseu {
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/*
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* Engine class & instance to be configured or queried.
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*/
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__u16 engine_class;
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__u16 engine_instance;
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/*
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* Unused for now. Must be cleared to zero.
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*/
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__u32 flags;
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/*
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* Mask of slices to enable for the context. Valid values are a subset
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* of the bitmask value returned for I915_PARAM_SLICE_MASK.
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*/
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__u64 slice_mask;
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/*
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* Mask of subslices to enable for the context. Valid values are a
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* subset of the bitmask value return by I915_PARAM_SUBSLICE_MASK.
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*/
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__u64 subslice_mask;
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/*
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* Minimum/Maximum number of EUs to enable per subslice for the
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* context. min_eus_per_subslice must be inferior or equal to
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* max_eus_per_subslice.
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*/
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__u16 min_eus_per_subslice;
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__u16 max_eus_per_subslice;
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/*
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* Unused for now. Must be cleared to zero.
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*/
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__u32 rsvd;
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};
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enum drm_i915_oa_format {
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I915_OA_FORMAT_A13 = 1, /* HSW only */
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I915_OA_FORMAT_A29, /* HSW only */
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