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drm/msm/hdmi: Fix HDMI pink strip issue seen on 8x96

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A 2 pixel wide pink strip was observed on the left end of some HDMI
monitors configured in a HDMI mode.

It turned out that we were missing out on configuring AVI infoframes, and
unlike APQ8064, the 8x96 HDMI H/W seems to be sensitive to that.

Add configuration of AVI infoframes. While at it, make sure that
hdmi_audio_update is only called when we've detected that the monitor
supports HDMI.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Archit Taneja 2017-06-16 10:39:36 +05:30 committed by Rob Clark
parent b474cbbb2b
commit 816fa34c05
1 changed files with 67 additions and 3 deletions
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64
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
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@ -86,6 +86,65 @@ static void power_off(struct drm_bridge *bridge)
} }
} }
#define AVI_IFRAME_LINE_NUMBER 1
static void msm_hdmi_config_avi_infoframe(struct hdmi *hdmi)
{
struct drm_crtc *crtc = hdmi->encoder->crtc;
const struct drm_display_mode *mode = &crtc->state->adjusted_mode;
union hdmi_infoframe frame;
u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
u32 val;
int len;
drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode);
len = hdmi_infoframe_pack(&frame, buffer, sizeof(buffer));
if (len < 0) {
dev_err(&hdmi->pdev->dev,
"failed to configure avi infoframe\n");
return;
}
/*
* the AVI_INFOx registers don't map exactly to how the AVI infoframes
* are packed according to the spec. The checksum from the header is
* written to the LSB byte of AVI_INFO0 and the version is written to
* the third byte from the LSB of AVI_INFO3
*/
hdmi_write(hdmi, REG_HDMI_AVI_INFO(0),
buffer[3] |
buffer[4] << 8 |
buffer[5] << 16 |
buffer[6] << 24);
hdmi_write(hdmi, REG_HDMI_AVI_INFO(1),
buffer[7] |
buffer[8] << 8 |
buffer[9] << 16 |
buffer[10] << 24);
hdmi_write(hdmi, REG_HDMI_AVI_INFO(2),
buffer[11] |
buffer[12] << 8 |
buffer[13] << 16 |
buffer[14] << 24);
hdmi_write(hdmi, REG_HDMI_AVI_INFO(3),
buffer[15] |
buffer[16] << 8 |
buffer[1] << 24);
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0,
HDMI_INFOFRAME_CTRL0_AVI_SEND |
HDMI_INFOFRAME_CTRL0_AVI_CONT);
val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1);
val &= ~HDMI_INFOFRAME_CTRL1_AVI_INFO_LINE__MASK;
val |= HDMI_INFOFRAME_CTRL1_AVI_INFO_LINE(AVI_IFRAME_LINE_NUMBER);
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL1, val);
}
static void msm_hdmi_bridge_pre_enable(struct drm_bridge *bridge) static void msm_hdmi_bridge_pre_enable(struct drm_bridge *bridge)
{ {
struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge); struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
@ -98,8 +157,11 @@ static void msm_hdmi_bridge_pre_enable(struct drm_bridge *bridge)
msm_hdmi_phy_resource_enable(phy); msm_hdmi_phy_resource_enable(phy);
msm_hdmi_power_on(bridge); msm_hdmi_power_on(bridge);
hdmi->power_on = true; hdmi->power_on = true;
if (hdmi->hdmi_mode) {
msm_hdmi_config_avi_infoframe(hdmi);
msm_hdmi_audio_update(hdmi); msm_hdmi_audio_update(hdmi);
} }
}
msm_hdmi_phy_powerup(phy, hdmi->pixclock); msm_hdmi_phy_powerup(phy, hdmi->pixclock);
@ -134,6 +196,7 @@ static void msm_hdmi_bridge_post_disable(struct drm_bridge *bridge)
if (hdmi->power_on) { if (hdmi->power_on) {
power_off(bridge); power_off(bridge);
hdmi->power_on = false; hdmi->power_on = false;
if (hdmi->hdmi_mode)
msm_hdmi_audio_update(hdmi); msm_hdmi_audio_update(hdmi);
msm_hdmi_phy_resource_disable(phy); msm_hdmi_phy_resource_disable(phy);
} }
@ -196,6 +259,7 @@ static void msm_hdmi_bridge_mode_set(struct drm_bridge *bridge,
DBG("frame_ctrl=%08x", frame_ctrl); DBG("frame_ctrl=%08x", frame_ctrl);
hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl); hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl);
if (hdmi->hdmi_mode)
msm_hdmi_audio_update(hdmi); msm_hdmi_audio_update(hdmi);
} }