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[POWERPC] 85xx: mpc85xx_mds - reset UCC ethernet properly

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Apart from that the current code doesn't compile it's also
meaningless with regard to the MPC8568E-MDS' BCSR.

This patch used to reset UCCs properly.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Anton Vorontsov 2007-10-05 21:46:47 +04:00 committed by Kumar Gala
parent af6521ea8a
commit 803dedb608
1 changed files with 13 additions and 9 deletions
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22
arch/powerpc/platforms/85xx/mpc85xx_mds.c
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@ -113,18 +113,22 @@ static void __init mpc85xx_mds_setup_arch(void)
}
if (bcsr_regs) {
u8 bcsr_phy;
#define BCSR_UCC1_GETH_EN (0x1 << 7)
#define BCSR_UCC2_GETH_EN (0x1 << 7)
#define BCSR_UCC1_MODE_MSK (0x3 << 4)
#define BCSR_UCC2_MODE_MSK (0x3 << 0)
/* Reset the Ethernet PHY */
bcsr_phy = in_be8(&bcsr_regs[9]);
bcsr_phy &= ~0x20;
out_be8(&bcsr_regs[9], bcsr_phy);
/* Turn off UCC1 & UCC2 */
clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
udelay(1000);
/* Mode is RGMII, all bits clear */
clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK |
BCSR_UCC2_MODE_MSK);
bcsr_phy = in_be8(&bcsr_regs[9]);
bcsr_phy |= 0x20;
out_be8(&bcsr_regs[9], bcsr_phy);
/* Turn UCC1 & UCC2 on */
setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
iounmap(bcsr_regs);
}