forked from Minki/linux
Renesas ARM Based SoC DT Updates for v3.16
r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs * Add MSIOF nodes and aliases * Correct I2C clock parents r8a7791 (R-Car M2) SoC * Add EHCI MSTP clock r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards * Add MSIOF nodes * Add gpio-keys support for SW2 * Enable I2C * Enable Quad SPI transfers for the SPI FLASH * Rename and lable spi to qspi, add spi0 alias * Set ethernet PHY LED mode r8a7779 (R-Car H1) and r8a7778 (R-Car M2) SoCs * Improve and correct HSPI nodes r8a7778 (R-Car M2) based Bock-W board * Add SPI FLASH r8a7740 (R-Mobile A1) SoC * Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings r8a7740 (R-Mobile A1) based Armadillo800 EVA board * Enable RTC * Use KEY_* macros for gpio-keys EMEV2 (Emma Mobile EV2) based kzm9g board * Use KEY_* macros for gpio-keys -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTVxU7AAoJENfPZGlqN0++RMQP/jTqlH234CX2SPrN9R8oz4Sy E6zLIbKjdID0Iw4brN8IDswwM5DO7efFdL5o6rNBCcue560Jotwiz6c8P2eFQgHR BlrwPXo4b8Em1ZQgXklGd5AXnwsm1AbsBa/RJDYuJbrDZNsC9k/zdWa3Sv+egKJr enIzwHIl2LZNCwrMuyXOW+uxpAzCppUL7X4ZYEw2VOJ4widBkjWJsDcewsgjNNXJ Y5k0xCMnkJEGssJY7lV1G9Vse07LyBAMx1o9PozPh6bQCqIZrOCZz1NdBMlpFU44 xxWtTGd2Fl1ibHE63t0BT/ZWHJBVNtXazSaC78DYkIKzPMX8swEyvbeZ8hM08h0B xVcDavUTbdkSY2POsIvt1dzeI6h2ZNt3pKfPrn6TBe5QEFe3CKT/gts0bncH5m/6 qlPcOCG6+N4VuhUMB8cUWSJnFfqmKOmM1w+1aPEbyXCIf/otEM7NDMEvfonlmep2 zRMQaPcTbUJ+h9guulAVUFLlRa8wTa9UVC/ften+p8bOxf3oH+cgE3NBT/EM+oiN X96zNxWtRhiny4aWbPzK7Lu0X4eZvuuC90diUguHkhas4OveflD83M+59pkbjKV6 eKrXZYDR5TKzQGpYnf2dg8+pXselypc7qeBTj8PUEsYwPnzwZrSbnzo3YmeRTshu VOOWcUaIZsvioGVyhDzF =1Izz -----END PGP SIGNATURE----- Merge tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Updates for v3.16" from Simon Horman: r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs * Add MSIOF nodes and aliases * Correct I2C clock parents r8a7791 (R-Car M2) SoC * Add EHCI MSTP clock r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards * Add MSIOF nodes * Add gpio-keys support for SW2 * Enable I2C * Enable Quad SPI transfers for the SPI FLASH * Rename and lable spi to qspi, add spi0 alias * Set ethernet PHY LED mode r8a7779 (R-Car H1) and r8a7778 (R-Car M2) SoCs * Improve and correct HSPI nodes r8a7778 (R-Car M2) based Bock-W board * Add SPI FLASH r8a7740 (R-Mobile A1) SoC * Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings r8a7740 (R-Mobile A1) based Armadillo800 EVA board * Enable RTC * Use KEY_* macros for gpio-keys EMEV2 (Emma Mobile EV2) based kzm9g board * Use KEY_* macros for gpio-keys * tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits) ARM: shmobile: armadillo-reference dts: Seiko Instruments, Inc is "sii" ARM: shmobile: lager dts: Enable Quad SPI transfers for the SPI FLASH ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI FLASH ARM: shmobile: r8a7790: add IIC(B) cores to dtsi ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi ARM: shmobile: r8a7790: add IIC0-2 clock macros ARM: shmobile: r8a7791: Fix the I2C clocks parents in DT ARM: shmobile: r8a7790: Fix the I2C clocks parents in DT ARM: shmobile: lager: Correct setting of ethernet PHY LED mode ARM: shmobile: armadillo-reference dts: enable RTC ARM: shmobile: r8a7791: Add EHCI MSTP clock ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings ARM: shmobile: koelsch: activate i2c6 bus ARM: shmobile: koelsch: make i2c2-pfc node unique ARM: shmobile: r8a7791: add IIC(B) cores to dtsi ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi ARM: shmobile: r8a7791: add IIC0/1 clock macros ARM: shmobile: kzm9g-reference dts: Use KEY_* macros for gpio-keys ARM: shmobile: armadillo-reference dts: Use KEY_* macros for gpio-keys ARM: shmobile: koelsch: Set ethernet PHY LED mode ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
7de24debea
@ -11,6 +11,7 @@
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/dts-v1/;
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#include "r8a7740.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pwm/pwm.h>
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@ -77,26 +78,26 @@
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power-key {
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gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
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linux,code = <116>;
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linux,code = <KEY_POWER>;
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label = "SW3";
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gpio-key,wakeup;
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};
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back-key {
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gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
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linux,code = <158>;
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linux,code = <KEY_BACK>;
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label = "SW4";
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};
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menu-key {
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gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
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linux,code = <139>;
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linux,code = <KEY_MENU>;
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label = "SW5";
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};
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home-key {
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gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
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linux,code = <102>;
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linux,code = <KEY_HOME>;
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label = "SW6";
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};
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};
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@ -117,6 +118,16 @@
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};
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};
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i2c2: i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "i2c-gpio";
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gpios = <&pfc 208 GPIO_ACTIVE_HIGH /* sda */
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&pfc 91 GPIO_ACTIVE_HIGH /* scl */
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>;
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i2c-gpio,delay-us = <5>;
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>;
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@ -166,6 +177,14 @@
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};
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};
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&i2c2 {
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status = "okay";
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rtc@30 {
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compatible = "sii,s35390a";
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reg = <0x30>;
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};
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};
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&pfc {
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pinctrl-0 = <&scifa1_pins>;
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pinctrl-names = "default";
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@ -125,7 +125,7 @@
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i2c0: i2c@fff20000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
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reg = <0xfff20000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
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@ -138,7 +138,7 @@
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i2c1: i2c@e6c20000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
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reg = <0xe6c20000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
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@ -173,7 +173,7 @@
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};
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mmcif0: mmc@e6bd0000 {
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compatible = "renesas,sh-mmcif";
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compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
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reg = <0xe6bd0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
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@ -219,7 +219,7 @@
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sh_fsi2: sound@fe1f0000 {
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#sound-dai-cells = <1>;
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compatible = "renesas,sh_fsi2";
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compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
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reg = <0xfe1f0000 0x400>;
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interrupt-parent = <&gic>;
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interrupts = <0 9 0x4>;
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@ -109,4 +109,18 @@
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pinctrl-0 = <&hspi0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,s25fl008k";
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reg = <0>;
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spi-max-frequency = <104000000>;
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m25p,fast-read;
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partition@0 {
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label = "data(spi)";
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reg = <0x00000000 0x00100000>;
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};
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};
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};
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@ -204,26 +204,32 @@
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};
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hspi0: spi@fffc7000 {
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compatible = "renesas,hspi";
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compatible = "renesas,hspi-r8a7778", "renesas,hspi";
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reg = <0xfffc7000 0x18>;
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interrupt-controller = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hspi1: spi@fffc8000 {
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compatible = "renesas,hspi";
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compatible = "renesas,hspi-r8a7778", "renesas,hspi";
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reg = <0xfffc8000 0x18>;
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interrupt-controller = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hspi2: spi@fffc6000 {
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compatible = "renesas,hspi";
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compatible = "renesas,hspi-r8a7778", "renesas,hspi";
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reg = <0xfffc6000 0x18>;
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interrupt-controller = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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@ -256,26 +256,32 @@
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};
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hspi0: spi@fffc7000 {
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compatible = "renesas,hspi";
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compatible = "renesas,hspi-r8a7779", "renesas,hspi";
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reg = <0xfffc7000 0x18>;
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interrupt-controller = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hspi1: spi@fffc8000 {
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compatible = "renesas,hspi";
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compatible = "renesas,hspi-r8a7779", "renesas,hspi";
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reg = <0xfffc8000 0x18>;
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interrupt-controller = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hspi2: spi@fffc6000 {
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compatible = "renesas,hspi";
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compatible = "renesas,hspi-r8a7779", "renesas,hspi";
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reg = <0xfffc6000 0x18>;
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interrupt-controller = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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@ -12,6 +12,7 @@
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/dts-v1/;
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#include "r8a7790.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Lager";
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@ -36,6 +37,39 @@
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#size-cells = <1>;
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};
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gpio_keys {
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compatible = "gpio-keys";
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button@1 {
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linux,code = <KEY_1>;
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label = "SW2-1";
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gpio-key,wakeup;
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debounce-interval = <20>;
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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};
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button@2 {
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linux,code = <KEY_2>;
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label = "SW2-2";
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gpio-key,wakeup;
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debounce-interval = <20>;
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gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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};
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button@3 {
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linux,code = <KEY_3>;
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label = "SW2-3";
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gpio-key,wakeup;
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debounce-interval = <20>;
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gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
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};
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button@4 {
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linux,code = <KEY_4>;
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label = "SW2-4";
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gpio-key,wakeup;
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debounce-interval = <20>;
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gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led6 {
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@ -155,10 +189,16 @@
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renesas,function = "mmc1";
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};
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qspi_pins: spi {
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qspi_pins: spi0 {
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renesas,groups = "qspi_ctrl", "qspi_data4";
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renesas,function = "qspi";
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};
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msiof1_pins: spi2 {
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renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
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"msiof1_tx";
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renesas,function = "msiof1";
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};
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};
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ðer {
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@ -173,6 +213,7 @@
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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micrel,led-mode = <1>;
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};
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};
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@ -190,7 +231,7 @@
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status = "okay";
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};
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&spi {
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&qspi {
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pinctrl-0 = <&qspi_pins>;
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pinctrl-names = "default";
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@ -202,6 +243,8 @@
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compatible = "spansion,s25fl512s";
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reg = <0>;
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spi-max-frequency = <30000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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m25p,fast-read;
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partition@0 {
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@ -221,6 +264,22 @@
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};
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};
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&msiof1 {
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pinctrl-0 = <&msiof1_pins>;
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pinctrl-names = "default";
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status = "okay";
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pmic: pmic@0 {
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compatible = "renesas,r2a11302ft";
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reg = <0>;
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spi-max-frequency = <6000000>;
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spi-cpol;
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spi-cpha;
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};
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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@ -24,6 +24,15 @@
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &iic0;
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i2c5 = &iic1;
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i2c6 = &iic2;
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i2c7 = &iic3;
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spi0 = &qspi;
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spi1 = &msiof0;
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spi2 = &msiof1;
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spi3 = &msiof2;
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spi4 = &msiof3;
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};
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cpus {
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@ -231,6 +240,46 @@
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status = "disabled";
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};
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iic0: i2c@e6500000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
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reg = <0 0xe6500000 0 0x425>;
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interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
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status = "disabled";
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};
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iic1: i2c@e6510000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
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reg = <0 0xe6510000 0 0x425>;
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interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
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status = "disabled";
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};
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iic2: i2c@e6520000 {
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||||
#address-cells = <1>;
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||||
#size-cells = <0>;
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||||
compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
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reg = <0 0xe6520000 0 0x425>;
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||||
interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
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||||
clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
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status = "disabled";
|
||||
};
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||||
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||||
iic3: i2c@e60b0000 {
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||||
#address-cells = <1>;
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||||
#size-cells = <0>;
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||||
compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
|
||||
reg = <0 0xe60b0000 0 0x425>;
|
||||
interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmcif0: mmcif@ee200000 {
|
||||
compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
|
||||
reg = <0 0xee200000 0 0x80>;
|
||||
@ -697,18 +746,19 @@
|
||||
mstp3_clks: mstp3_clks@e615013c {
|
||||
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
|
||||
clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
|
||||
<&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
|
||||
<&mmc0_clk>, <&rclk_clk>;
|
||||
clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
|
||||
<&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
|
||||
<&hp_clk>, <&hp_clk>, <&rclk_clk>;
|
||||
#clock-cells = <1>;
|
||||
renesas,clock-indices = <
|
||||
R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
|
||||
R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
|
||||
R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
|
||||
R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
|
||||
R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
|
||||
R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
|
||||
>;
|
||||
clock-output-names =
|
||||
"tpu0", "mmcif1", "sdhi3", "sdhi2",
|
||||
"sdhi1", "sdhi0", "mmcif0", "cmt1";
|
||||
"iic2", "tpu0", "mmcif1", "sdhi3",
|
||||
"sdhi2", "sdhi1", "sdhi0", "mmcif0",
|
||||
"iic0", "iic1", "cmt1";
|
||||
};
|
||||
mstp5_clks: mstp5_clks@e6150144 {
|
||||
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
@ -752,20 +802,20 @@
|
||||
mstp9_clks: mstp9_clks@e6150994 {
|
||||
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
|
||||
clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
|
||||
<&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
|
||||
clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
|
||||
<&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
|
||||
#clock-cells = <1>;
|
||||
renesas,clock-indices = <
|
||||
R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
|
||||
R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
|
||||
R8A7790_CLK_I2C0
|
||||
R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
|
||||
R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
|
||||
>;
|
||||
clock-output-names =
|
||||
"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
|
||||
"rcan1", "rcan0", "qspi_mod", "iic3",
|
||||
"i2c3", "i2c2", "i2c1", "i2c0";
|
||||
};
|
||||
};
|
||||
|
||||
spi: spi@e6b10000 {
|
||||
qspi: spi@e6b10000 {
|
||||
compatible = "renesas,qspi-r8a7790", "renesas,qspi";
|
||||
reg = <0 0xe6b10000 0 0x2c>;
|
||||
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -775,4 +825,44 @@
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof0: spi@e6e20000 {
|
||||
compatible = "renesas,msiof-r8a7790";
|
||||
reg = <0 0xe6e20000 0 0x0064>;
|
||||
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof1: spi@e6e10000 {
|
||||
compatible = "renesas,msiof-r8a7790";
|
||||
reg = <0 0xe6e10000 0 0x0064>;
|
||||
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof2: spi@e6e00000 {
|
||||
compatible = "renesas,msiof-r8a7790";
|
||||
reg = <0 0xe6e00000 0 0x0064>;
|
||||
interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof3: spi@e6c90000 {
|
||||
compatible = "renesas,msiof-r8a7790";
|
||||
reg = <0 0xe6c90000 0 0x0064>;
|
||||
interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -13,6 +13,7 @@
|
||||
/dts-v1/;
|
||||
#include "r8a7791.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Koelsch";
|
||||
@ -40,51 +41,79 @@
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-1 {
|
||||
gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_1>;
|
||||
label = "SW2-1";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-2 {
|
||||
gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_2>;
|
||||
label = "SW2-2";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-3 {
|
||||
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_3>;
|
||||
label = "SW2-3";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-4 {
|
||||
gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_4>;
|
||||
label = "SW2-4";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-a {
|
||||
gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <30>;
|
||||
linux,code = <KEY_A>;
|
||||
label = "SW30";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-b {
|
||||
gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <48>;
|
||||
linux,code = <KEY_B>;
|
||||
label = "SW31";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-c {
|
||||
gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <46>;
|
||||
linux,code = <KEY_C>;
|
||||
label = "SW32";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-d {
|
||||
gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <32>;
|
||||
linux,code = <KEY_D>;
|
||||
label = "SW33";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-e {
|
||||
gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <18>;
|
||||
linux,code = <KEY_E>;
|
||||
label = "SW34";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-f {
|
||||
gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <33>;
|
||||
linux,code = <KEY_F>;
|
||||
label = "SW35";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-g {
|
||||
gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <34>;
|
||||
linux,code = <KEY_G>;
|
||||
label = "SW36";
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <20>;
|
||||
@ -195,11 +224,16 @@
|
||||
};
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&pfc {
|
||||
pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
i2c2_pins: i2c {
|
||||
i2c2_pins: i2c2 {
|
||||
renesas,groups = "i2c2";
|
||||
renesas,function = "i2c2";
|
||||
};
|
||||
@ -244,10 +278,16 @@
|
||||
renesas,function = "sdhi2";
|
||||
};
|
||||
|
||||
qspi_pins: spi {
|
||||
qspi_pins: spi0 {
|
||||
renesas,groups = "qspi_ctrl", "qspi_data4";
|
||||
renesas,function = "qspi";
|
||||
};
|
||||
|
||||
msiof0_pins: spi1 {
|
||||
renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
|
||||
"msiof0_tx";
|
||||
renesas,function = "msiof0";
|
||||
};
|
||||
};
|
||||
|
||||
ðer {
|
||||
@ -262,6 +302,7 @@
|
||||
reg = <1>;
|
||||
interrupt-parent = <&irqc0>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
micrel,led-mode = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -301,7 +342,7 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi {
|
||||
&qspi {
|
||||
pinctrl-0 = <&qspi_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@ -313,6 +354,8 @@
|
||||
compatible = "spansion,s25fl512s";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <30000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
m25p,fast-read;
|
||||
|
||||
partition@0 {
|
||||
@ -331,3 +374,18 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&msiof0 {
|
||||
pinctrl-0 = <&msiof0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
|
||||
pmic: pmic@0 {
|
||||
compatible = "renesas,r2a11302ft";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <6000000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
};
|
||||
};
|
||||
|
||||
@ -27,6 +27,13 @@
|
||||
i2c3 = &i2c3;
|
||||
i2c4 = &i2c4;
|
||||
i2c5 = &i2c5;
|
||||
i2c6 = &i2c6;
|
||||
i2c7 = &i2c7;
|
||||
i2c8 = &i2c8;
|
||||
spi0 = &qspi;
|
||||
spi1 = &msiof0;
|
||||
spi2 = &msiof1;
|
||||
spi3 = &msiof2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
@ -37,14 +44,14 @@
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0>;
|
||||
clock-frequency = <1300000000>;
|
||||
clock-frequency = <1500000000>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <1>;
|
||||
clock-frequency = <1300000000>;
|
||||
clock-frequency = <1500000000>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -180,6 +187,7 @@
|
||||
<0 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
/* The memory map in the User's Manual maps the cores to bus numbers */
|
||||
i2c0: i2c@e6508000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -231,6 +239,7 @@
|
||||
};
|
||||
|
||||
i2c5: i2c@e6528000 {
|
||||
/* doesn't need pinmux */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,i2c-r8a7791";
|
||||
@ -240,6 +249,37 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c6: i2c@e60b0000 {
|
||||
/* doesn't need pinmux */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
|
||||
reg = <0 0xe60b0000 0 0x425>;
|
||||
interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c7: i2c@e6500000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
|
||||
reg = <0 0xe6500000 0 0x425>;
|
||||
interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c8: i2c@e6510000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
|
||||
reg = <0 0xe6510000 0 0x425>;
|
||||
interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pfc: pfc@e6060000 {
|
||||
compatible = "renesas,pfc-r8a7791";
|
||||
reg = <0 0xe6060000 0 0x250>;
|
||||
@ -712,15 +752,16 @@
|
||||
mstp3_clks: mstp3_clks@e615013c {
|
||||
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
|
||||
clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>,
|
||||
<&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>;
|
||||
clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
|
||||
<&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>;
|
||||
#clock-cells = <1>;
|
||||
renesas,clock-indices = <
|
||||
R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1
|
||||
R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1
|
||||
R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
|
||||
R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_IIC1 R8A7791_CLK_CMT1
|
||||
>;
|
||||
clock-output-names =
|
||||
"tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1";
|
||||
"tpu0", "sdhi2", "sdhi1", "sdhi0",
|
||||
"mmcif0", "i2c7", "i2c8", "cmt1";
|
||||
};
|
||||
mstp5_clks: mstp5_clks@e6150144 {
|
||||
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
@ -733,19 +774,19 @@
|
||||
mstp7_clks: mstp7_clks@e615014c {
|
||||
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
|
||||
clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
|
||||
clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
|
||||
<&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
|
||||
<&zx_clk>, <&zx_clk>, <&zx_clk>;
|
||||
#clock-cells = <1>;
|
||||
renesas,clock-indices = <
|
||||
R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
|
||||
R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
|
||||
R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
|
||||
R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
|
||||
R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
|
||||
R8A7791_CLK_LVDS0
|
||||
>;
|
||||
clock-output-names =
|
||||
"hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
|
||||
"ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
|
||||
"scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
|
||||
};
|
||||
mstp8_clks: mstp8_clks@e6150990 {
|
||||
@ -764,17 +805,17 @@
|
||||
mstp9_clks: mstp9_clks@e6150994 {
|
||||
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
|
||||
clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>,
|
||||
<&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
|
||||
<&p_clk>;
|
||||
clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
|
||||
<&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
|
||||
<&hp_clk>, <&hp_clk>;
|
||||
#clock-cells = <1>;
|
||||
renesas,clock-indices = <
|
||||
R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD
|
||||
R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3
|
||||
R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
|
||||
R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
|
||||
R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
|
||||
R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
|
||||
>;
|
||||
clock-output-names =
|
||||
"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
|
||||
"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
|
||||
"i2c2", "i2c1", "i2c0";
|
||||
};
|
||||
mstp11_clks: mstp11_clks@e615099c {
|
||||
@ -789,7 +830,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
spi: spi@e6b10000 {
|
||||
qspi: spi@e6b10000 {
|
||||
compatible = "renesas,qspi-r8a7791", "renesas,qspi";
|
||||
reg = <0 0xe6b10000 0 0x2c>;
|
||||
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -799,4 +840,34 @@
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof0: spi@e6e20000 {
|
||||
compatible = "renesas,msiof-r8a7791";
|
||||
reg = <0 0xe6e20000 0 0x0064>;
|
||||
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof1: spi@e6e10000 {
|
||||
compatible = "renesas,msiof-r8a7791";
|
||||
reg = <0 0xe6e10000 0 0x0064>;
|
||||
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof2: spi@e6e00000 {
|
||||
compatible = "renesas,msiof-r8a7791";
|
||||
reg = <0 0xe6e00000 0 0x0064>;
|
||||
interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -14,6 +14,7 @@
|
||||
/dts-v1/;
|
||||
#include "sh73a0.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
@ -112,43 +113,43 @@
|
||||
|
||||
back-key {
|
||||
gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <158>;
|
||||
linux,code = <KEY_BACK>;
|
||||
label = "SW3";
|
||||
};
|
||||
|
||||
right-key {
|
||||
gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <106>;
|
||||
linux,code = <KEY_RIGHT>;
|
||||
label = "SW2-R";
|
||||
};
|
||||
|
||||
left-key {
|
||||
gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <105>;
|
||||
linux,code = <KEY_LEFT>;
|
||||
label = "SW2-L";
|
||||
};
|
||||
|
||||
enter-key {
|
||||
gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <28>;
|
||||
linux,code = <KEY_ENTER>;
|
||||
label = "SW2-P";
|
||||
};
|
||||
|
||||
up-key {
|
||||
gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <103>;
|
||||
linux,code = <KEY_UP>;
|
||||
label = "SW2-U";
|
||||
};
|
||||
|
||||
down-key {
|
||||
gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <108>;
|
||||
linux,code = <KEY_DOWN>;
|
||||
label = "SW2-D";
|
||||
};
|
||||
|
||||
home-key {
|
||||
gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <102>;
|
||||
linux,code = <KEY_HOME>;
|
||||
label = "SW1";
|
||||
};
|
||||
};
|
||||
|
||||
@ -50,6 +50,7 @@
|
||||
#define R8A7790_CLK_SYS_DMAC0 19
|
||||
|
||||
/* MSTP3 */
|
||||
#define R8A7790_CLK_IIC2 0
|
||||
#define R8A7790_CLK_TPU0 4
|
||||
#define R8A7790_CLK_MMCIF1 5
|
||||
#define R8A7790_CLK_SDHI3 11
|
||||
@ -57,6 +58,8 @@
|
||||
#define R8A7790_CLK_SDHI1 13
|
||||
#define R8A7790_CLK_SDHI0 14
|
||||
#define R8A7790_CLK_MMCIF0 15
|
||||
#define R8A7790_CLK_IIC0 18
|
||||
#define R8A7790_CLK_IIC1 23
|
||||
#define R8A7790_CLK_SSUSB 28
|
||||
#define R8A7790_CLK_CMT1 29
|
||||
#define R8A7790_CLK_USBDMAC0 30
|
||||
|
||||
@ -51,6 +51,8 @@
|
||||
#define R8A7791_CLK_SDHI1 12
|
||||
#define R8A7791_CLK_SDHI0 14
|
||||
#define R8A7791_CLK_MMCIF0 15
|
||||
#define R8A7791_CLK_IIC0 18
|
||||
#define R8A7791_CLK_IIC1 23
|
||||
#define R8A7791_CLK_SSUSB 28
|
||||
#define R8A7791_CLK_CMT1 29
|
||||
#define R8A7791_CLK_USBDMAC0 30
|
||||
@ -61,6 +63,7 @@
|
||||
#define R8A7791_CLK_PWM 23
|
||||
|
||||
/* MSTP7 */
|
||||
#define R8A7791_CLK_EHCI 3
|
||||
#define R8A7791_CLK_HSUSB 4
|
||||
#define R8A7791_CLK_HSCIF2 13
|
||||
#define R8A7791_CLK_SCIF5 14
|
||||
|
||||
Loading…
Reference in New Issue
Block a user